BLDC controller, highly advanced.

[rhitee05]

Motor inductance still doesn't matter for capacitor sizing...

Maybe you should start here:
http://endless-sphere.com/forums/viewtopic.php?f=30&t=31804

[bearing]

The powerstage and motor can simply be simulated as a pulsed current when playing with capacitor values. It doesn't matter if the motor current has some slope to it.

The ceramic/film capacitors are only there to take care of the flanks. They need to have low ESL. The electrolytics take care of the main current. To be able to simulate what's going on during the flanks you need to model: the electrolytics ESL+ESR, stray inductance between the electrolytics and the ceramic/film, and stray inductance between ceramics and power stage.

Regarding your cocksure answers to rhitee05 earlier, I would like to know on what science you are basing your answers? to me it seems like rhitee05 has got it all right, which makes you the one who needs to explain your sources and reasoning.

[Teh Stork]

The powerstage and motor can simply be simulated as a pulsed current when playing with capacitor values. It doesn't matter if the motor current has some slope to it.

The ceramic/film capacitors are only there to take care of the flanks. They need to have low ESL. The electrolytics take care of the main current. To be able to simulate what's going on during the flanks you need to model: the electrolytics ESL+ESR, stray inductance between the electrolytics and the ceramic/film, and stray inductance between ceramics and power stage.

That makes sense I was thinking about dropping electrolytics entirely, but it looks like there is no way around them w/o spending lots of money

Regarding your cocksure answers to rhitee05 earlier, I would like to know on what science you are basing your answers? to me it seems like rhitee05 has got it all right, which makes you the one who needs to explain your sources and reasoning.

This document:[url=http://www.ecicaps.com/pdf/whitepapers/IEMDC_2009_11310_Final_Rev_4.pdf]Selecting Film Bus Link Capacitors
For High Performance Inverter Applications[/url]
Why won't it link :S - Selecting Film Bus Link Capacitors
For High Performance Inverter Applications: from Ecicaps

[rhitee05]

This document:[url=http://www.ecicaps.com/pdf/whitepapers/IEMDC_2009_11310_Final_Rev_4.pdf]Selecting Film Bus Link Capacitors
For High Performance Inverter Applications[/url]
Why won't it link :S - Selecting Film Bus Link Capacitors
For High Performance Inverter Applications: from Epicaps

That article is fatally flawed and very, very wrong. Their entire analysis is based on the assumption that somehow the input current is equal to the output current, which is not at all correct. There are several other errors - or at least unstated assumptions - but that initial assumption makes the entire article worth exactly nothing. I could write quite extensively and explain exactly why that's wrong and how you actually need to do it, but I have a feeling that would be a waste of my time. I would suggest you start with some very basic reading on these topics - there are lots of good app notes and such available online, and anything related to buck converters is applicable to BLDC controllers as well (3-phase buck, basically). You're going to find yourself very far over your head very quickly (if not already) unless you get a better grasp of the basic theory at work here.

[Lagoethe]

Maybe you should start here:
viewtopic.php?f=30&t=31804

Rhitee, you should check my last post on this thread. (and the attached file). I'm no master, but I really think it can be used to our purpose (you used to say the opposite a few months ago, i'd like you to check again please, and get your advice).

That article is fatally flawed and very, very wrong.

You''r right, everything isn't good on internet.

Motor inductance still doesn't matter for capacitor sizing...

I'm not 100% sure about that after all. Ripple curent in DC capacitors is linked to Modulation index, which seems somehow liked to motor inductance and resistance (has to be confirmed).
Point n°2: DC capacitor ripple current isn't proportional to Irms (of the system) <= If someone has a bench to test it, I'd love it to be confirmed (I'll have my homemade controller to test this soon)

one prototype is worth 1000 simulations

Depends on your needs.

Have a nice day

[Teh Stork]

Well, I've come to the conclution I need to bring forth some blue smoke, hopefully datalogged by our schools 8 channel oscilloscope. As some people here state, one prototype is better than 1000 simulations.

Couple of troublesome points:
- Lazy driver, 0,5A max. Solution: Low gate charge on lower fet. I'll limit on my upper fets at 200nC, (these can be low RDSon) (400ns Rise time). The bottom fets will be something with low gate charge (sub 100nC (200ns)) and preferably some rise and fall time - as it would otherwise contribute greatly to noise.
- Capacitance. I'll just start with 200uF of MLCCs, to see if they are useable. PWM will be turned way up - 80kHz start.

This Mosfet from fairchild is a strong candidate as a bottom fet.

Even tho I like the differentiating of fets, I'm not sure how easy it is to implement FOC with only pwm on lower fets. I'll look more into it later

[zombiess]

Teh Stork,
It could just be me, but you seem to be making this much more complicated than it need be for the sake of learning. Why not just build a simple 6 FET power stage that's been proven to work using low cost FETs and play around with it by tweaking and scoping the signals and then build on it from that point. You seem to be way too caught up in advanced theory. You need to walk before you can run.