Please give details!
My very own FSM was born ... let's say... yesterday(on paper) and its design included 2-bit ram for holding the "current address"/state, combinational logic for transitioning between different states depending on the previous state and the input, "Bios"/"rom" for the start-up state(address = 00) and one output variable. I was implementing a digital "lock" with a three-binary-digit code. I was wondering if the RAM could serve a more special purpose in these simple FSMs kind of like real computers do, except without the "temporarily hold CPU instructions", "temporary data" purposes and that stuff.
I have it written down on a flow diagram but I haven't figured out the actual electronic implementation of "wait until input comes in" before transitioning and other electronic implementation details... hmmmm...
My very own FSM was born ... let's say... yesterday(on paper) and its design included 2-bit ram for holding the "current address"/state, combinational logic for transitioning between different states depending on the previous state and the input, "Bios"/"rom" for the start-up state(address = 00) and one output variable. I was implementing a digital "lock" with a three-binary-digit code. I was wondering if the RAM could serve a more special purpose in these simple FSMs kind of like real computers do, except without the "temporarily hold CPU instructions", "temporary data" purposes and that stuff.
I have it written down on a flow diagram but I haven't figured out the actual electronic implementation of "wait until input comes in" before transitioning and other electronic implementation details... hmmmm...