N-cell serial bat blocks connected in parallel - BMS concept

Hello,
I am curious if there are any ES members that would be interested in working with University special project EE Department students to study a possible n-cell serial battery blocks connected in parallel BMS with the goal of a system that incorporates the AS8506C Active Balancer IC. If you are interested in being involved in such a mentoring team, please contact me by PM.

I'd be careful with that company and their chip. Not very well known or tested. I would be suspicious when the data sheet says:

Caution: In the application it’s recommended to connect the AS8506C devices stacked first and connect the
battery stack from bottom to top in sequence to avoid any possible damage of the system. While removing
the battery pack its strictly recommended to remove the battery pack from the top. Removing the battery
pack from bottom will damage the system

You should stick with TI or a Linear tech solution. They have solved these problems and they will support you with local application engineers and forums etc.
They have way more experience than AMS at this stuff.
I think Linear tech had a charge shuffling eval board that is probably more reliable than AMS.
Always buy an eval board whenever there is one available.

Velias,
We have a solution for the problem you mentioned. Glad you read the data sheet. Are you referring to the LT8584 at Linear Tech? If so, it does not have the same functionality. Ti is not responding to any questions and it takes too many parts. Thanks for responding.