Recent content by badgineer

Hi Tamas! I'm really happy to see another working board! Great! I think you're the only person I know of to have tested the v0.6 (its not versioned yet in github, but should be v0.6 right? does it say v0.6 on your PCB?) So ***Thank You*** for testing it, and thank you for reporting back...

Hi. A guy from Germany I know ordered a set on 24 September and they did not complain at that time. However that batch is not tested yet so cant say if it works or not. Expanding the outline seems like a safe enough thing to do though :) Br,

Hi. What owhite said :) and i think its necessary to stress the "some caps" part - you need a few thousand uF, depending on the max phase amps you want to push :) oh and thick cables and banana plugs or whatever high amp connectors you like also, the F405 pill is also jlcpcb ordered, and...

Hi everybody. bad badgineer just merged branch to main. this means, basically v0.5 is out. but not tagging yet, maybe we find bugs... this also means: kibot made a new set of JLCPCB files. thats the easiest way to order. This is the 100V max voltage (20s) version. for 150v max you need some...

Hi. OK, understood. Those traces, R1 and R2, create problems only if you put only 1 FET instead of 3. Because Shunt resistance is not SHA1 || SHA2 || SHA3 as the software assumes by default, but (SHA1+ R1) || (SHA2) || (SHA3+R2) -> assuming middle Fet populated and the other 2 are not. If...

Hi. I am not sure what you are saying. The shunts are all near the source of each mosfet. Resistance between source and shunt should be very low! The circles you have drawn highlight the wide trace between the sources, for current equalizing in case of mosfet rdson inconsistence. If you are...

Hi. The trace is always referencing a very close gnd plane (sandwiched for most of its length in between gnd planes actually). This reduces its inductance by a lot, protects it against noise. Also, the peak current, about 2 amps in our case as per gate resistance iirc, is felt for just a...

Hi. No, there are no fan headers. If you wire a fan to 12v, make sure your total load, including fan, does not exceed what your buck converter can deliver. As in, get a beefy one :)

Wow @owhite - even so you get a phase current peak over 270A on your hill climb! (if I read the graph right). That's awesome. And the field weakening is quite something to behold. And very nice written and presented. Thanks for the data. I really enjoyed seeing it. Br,

Mxlemming already beat me to the punch, but i'll add some explanations around. There's 2 possibilities. 1) the BRK is triggered by really a spike in phase current that really exceeds the hardware limit. I'd recommend against disabling that. Magic smoke is even more annoying (at least to most...

Hi, the gs* are gate signal test points. here example for the 2 gsA test points. The other 3 are probably all gnd. I must admit i did not invest much effort into making the labels nice and readable :D br,

Hi. This sounds similar to a problem somebody had before. The BRK (PB12 low) is triggered as overcurrent or overvoltage protection. Your current imbalance error also points to this. *** do not ignore this - it might be a serious issue *** In the case i mentioned it was a bad gate resistor...

Hi everybody. Just merged v0.4 to main. contains quite a few small changes improvements - see readme :) Br,

Hi Dayanul, Regarding open source - yeah, we did it all open, down into detail. Many open source projects also have commercial "sister projects" - so there is a motivation behind not giving out everything. That's not true in this case, MP2 is probably useless commercially. (tedious to...

Thanks for pointing this out :) My idea was the following. 1) I did care for a cap on each power consumer on the MP2, and on the pill... did not take so much care but I think they are all there. But even if some are missing... 2) Check the PCB. i did not forgo completely a power plane. I mean...