Gate-to-source capacitor value?
- Thread starter OzCad
- Start date
PhoenixOSU
100 W
What are you using to drive the FETs on/off?
dnmun
1 PW
and what is an anti dv/dt cap? do you mean the cap between gate and source on the high side driver?
ZapPat
10 kW
Hummm... is that really what those extra caps are for? On my 116 board (EB212-A-3) they are both on the high side and low side between gates and sources. I assumed they were added there to slow down switching, and I was actually going to remove them since the IR3006's I'm using have much more gate capacitance than the cheapo FETs they usually use on these things.
I would be a bit surprised if these were added to hold the low side drive off during high side turn on, since these controllers switch pretty slowly. Can you tell us why you think these caps are there for that, OzCad? On this board they are 9nFs per two paralleled FETs, which is about what the bigger FETs add compared to the crappy ones I believe.
I would be a bit surprised if these were added to hold the low side drive off during high side turn on, since these controllers switch pretty slowly. Can you tell us why you think these caps are there for that, OzCad? On this board they are 9nFs per two paralleled FETs, which is about what the bigger FETs add compared to the crappy ones I believe.
I humbly claim neophyte status in power electronics. Switching power FETs is new to me (first project). My limited grasp is as follows:
In IGBT-land the capacitor serves multiple functions.
The first is to reduce the miller-C induced blip on the gate voltage when the other transistor turns on and rapidly wrenches up the collector (or drain) voltage. This Vge blip can cause totem-pole shoot-through and can be hard to control by gate resistor value alone without compromising other aspects of switching. The add-on capacitor forms a capacitive divider with the miller C.
Another function is to slow the rise time of Vge at turn-on during the period BETWEEN Vge reaching VgeTH (where the IGBT starts to conduct) and when Vge reaches the miller plateau (when the IGBT has taken over the full inductive load current from the diode and the collector voltage is now starting to ramp down). By slowing this part of the Vge waveform, the freewheel diode is dragged into the reverse-biased state more gently, reducing savagery of the tRR reverse recovery current transient. The capacitor should have no effect during the Vge miller plateau region, because the voltage across it is not changing significantly, therefore no current is flowing through it.
My quest is to be able to calculate the capacitor value algebraically, and fine tune it by waveform observation. Of course this interacts with every other part of the inverter stage.
I thought this FET/IGBT power game would be easy, after all these things only have 3 leads, how hard can it be to just turn 'em on & off? I am beginning to appreciate the skill of the cogniscenti. I bend the knee and doff the cap, eyes downcast, my hands where you can see them.
In IGBT-land the capacitor serves multiple functions.
The first is to reduce the miller-C induced blip on the gate voltage when the other transistor turns on and rapidly wrenches up the collector (or drain) voltage. This Vge blip can cause totem-pole shoot-through and can be hard to control by gate resistor value alone without compromising other aspects of switching. The add-on capacitor forms a capacitive divider with the miller C.
Another function is to slow the rise time of Vge at turn-on during the period BETWEEN Vge reaching VgeTH (where the IGBT starts to conduct) and when Vge reaches the miller plateau (when the IGBT has taken over the full inductive load current from the diode and the collector voltage is now starting to ramp down). By slowing this part of the Vge waveform, the freewheel diode is dragged into the reverse-biased state more gently, reducing savagery of the tRR reverse recovery current transient. The capacitor should have no effect during the Vge miller plateau region, because the voltage across it is not changing significantly, therefore no current is flowing through it.
My quest is to be able to calculate the capacitor value algebraically, and fine tune it by waveform observation. Of course this interacts with every other part of the inverter stage.
I thought this FET/IGBT power game would be easy, after all these things only have 3 leads, how hard can it be to just turn 'em on & off? I am beginning to appreciate the skill of the cogniscenti. I bend the knee and doff the cap, eyes downcast, my hands where you can see them.
dnmun
1 PW
i was just in powell's bookstore. looking for textbooks on switch mode power supply design.
found a text entitled 'switching power supply design' by pressman, billings, and morey.
they had a section on power mosfets and IGBTs. they discuss what miller capacitance is and how it is modeled with the capacitance to the source and drain, pretty worthwhile reading, about the only thing i found there relevant.
you may wanna search for it in your library or borrow it from university through interlibrary lending. $100 is a lot of cash for me. billings has another one called 'switchmode power supply handbook' $114, but it was sold out. i suspect either one would help you out.
i looked on amazon and not much there either.
for my interest in the switch mode design the application notes in the data sheet i got for the OB2269CP was enuff to get me mostly through this charger. i even discovered that what i thought was a npn transistor for switching (labeled J22 which is why i thought it was NPN) turns out is a power mosfet controlled by the output of the OB2269CP. now i can see how the output charger section controls the input section through the phototransistor at pin 2 on the OB2269CP, and also i guess i understand why they have two isolation transformers at the front end to keep the noise down and it switches at about 220khz.
also discovered that a TO92 part labeled 431 was a 2.5V voltage reference active device meant to be the zener for the reference in the feedback loop to the OB2269CP pwm current modulating controller/oscillator for the current into the inductor. learned a lot about switchers over the last few days. now if i could just figure out why the charger doesn't work, all this effort would not be in vain, hehe.
it has one 8 leg SOIC F9444 which controls the charging output by controlling a 3 terminal surface mount transistor to turn on the p channel FET that connects the output to the current source. and a LM358 dual op amp to run the fan and drive the phototransistor too i think. all very interesting, but i don't know what is broken to keep it from performing correctly.
found a text entitled 'switching power supply design' by pressman, billings, and morey.
they had a section on power mosfets and IGBTs. they discuss what miller capacitance is and how it is modeled with the capacitance to the source and drain, pretty worthwhile reading, about the only thing i found there relevant.
you may wanna search for it in your library or borrow it from university through interlibrary lending. $100 is a lot of cash for me. billings has another one called 'switchmode power supply handbook' $114, but it was sold out. i suspect either one would help you out.
i looked on amazon and not much there either.
for my interest in the switch mode design the application notes in the data sheet i got for the OB2269CP was enuff to get me mostly through this charger. i even discovered that what i thought was a npn transistor for switching (labeled J22 which is why i thought it was NPN) turns out is a power mosfet controlled by the output of the OB2269CP. now i can see how the output charger section controls the input section through the phototransistor at pin 2 on the OB2269CP, and also i guess i understand why they have two isolation transformers at the front end to keep the noise down and it switches at about 220khz.
also discovered that a TO92 part labeled 431 was a 2.5V voltage reference active device meant to be the zener for the reference in the feedback loop to the OB2269CP pwm current modulating controller/oscillator for the current into the inductor. learned a lot about switchers over the last few days. now if i could just figure out why the charger doesn't work, all this effort would not be in vain, hehe.
it has one 8 leg SOIC F9444 which controls the charging output by controlling a 3 terminal surface mount transistor to turn on the p channel FET that connects the output to the current source. and a LM358 dual op amp to run the fan and drive the phototransistor too i think. all very interesting, but i don't know what is broken to keep it from performing correctly.
