That's caused by the total power loop inductance (the loop formed by the DC link caps and FETs). As the FET opens, current starts to circulate and it's the caps supplying it; but the inductance in the loop doesn't like a sudden current change, so it counteracts by "subtracting" voltage from the supply- The time length from the start of the 1st slow slope to the start of the 2nd fast one is the time it takes for the current to switch between 0 and max. See the image below.Arlo1 said:On the turn on it starts with a slow slope then a second faster slope.Njay said:Which 2 slopes?