Design An Individual Cell Voltage Meter

[Toorbough ULL-Zeveigh]

Since Bob won't put you out of you're misery re-inventing the wheel.
You can buy one of these & reverse it.

http://endless-sphere.com/forums/viewtopic.php?f=14&t=571

Another point of interest, which I do believe is vital to get the most for the longest from a big lipo pack, is to monitor each cell during discharge.

The mimimalist way, and the most practical way, I think is to employ the
LVD-1T lipo monitor. This is a unique product; there is no clone or equivalent on the market. It is not a big seller.

If you ever really do reach the level of understanding electrospeak, you will come to the dawning realization that you don't have to design much of anything.
The heavy lifting has been done for you, (the word cookbook gets tossed about a lot).
You mostly just cut-n-paste the appropriate building blocks to your requirements.
So no need to roll up your sleeves & jump in straight away.



I'm hesitant to stick my foot in it, *but* the building block your re-inventing by the looks of how your spice circuit is shaping up is called a window comparator.
The LM3914 is basically a stack of these elements.
First google entry came up here, but there's loads of em.

http://home.cogeco.ca/~rpaisley4/Comparators.html

I have a rather nice schematic of one that uses a single bicolor led to inform you when the voltage is under/equal/over but don't know how to do attachments with the new look forum.
BTW, you get away cheaper (if that matters to you) using individual leds rather than a unitized led bar, but it is slightly more work stuffing the board.
Could then probably build this for close to a buck per cell.
The 9 bucks you're paying for the LVD-1T is strictly for it's small size in R/C use which would be wasted in this app.

 

[safe]

Lipo with its clothes off

Can you believe that the name of that thread was:

"Lipo with its clothes off"

...how the heck am I supposed to locate information when people title their threads with titles that don't make any sense?

It's insulting...

 

[Toorbough ULL-Zeveigh]

...how the heck am I supposed to locate information when people title their threads with titles that don't make any sense?

That's our Reid.

You do it the same way I did, yoos yore remembery.
I was given to understand that load garth had an enoourmous organ.

Hey, I just noticed my join date.
I've been here for a year.
Seems longer somehow. :?
I guess it's not the years, it's the miles.

 

[fechter]

@fletcher, that's a nifty chip you found. Wonder If someone makes a similar chip integrated with an optoisolator for use in high voltage battery packs?

Marty

Now that's a good idea. No reason they couldn't do that. I've never seen one.

 

[safe]

@fletcher, that's a nifty chip you found. Wonder If someone makes a similar chip integrated with an optoisolator for use in high voltage battery packs? Marty

Now that's a good idea. No reason they couldn't do that. I've never seen one.

I still don't understand what the optoisolator is needed for. Is it to prevent leakage (unnecessary energy loss when the battery is sitting idle) or is there some other reason?

Why?

 

[solarbbq2003]

dont forget bretts led on lithiums for dummies method,
http://www.endless-sphere.com/forums/viewtopic.php?f=14&t=2341&p=31706&hilit=+led#p31706

 

[safe]

The Lightbulb Just Came On!

Yeah, you're right, if you really wanted the most bare bones LVC signal you could just string an LED across each cell. When the voltage dropped below the LED lightup voltage it goes off. The obvious negative is that it's going to be on all night and all day whether you ride the bike or not, so it's a very "leaky" idea. However, if there was some way to flip a switch that would disconnect all those LED's when the bike was at rest then it would be better. However, if you just gave the pack a quick charge up right before each ride it might be okay.

One way to do this would be to have all your cells connected with individual power wires. When you are not riding the bike you disconnect the power wires (and possibly use them in a parallel or individual way for charging) and it's with the "controller side" of this power connection that the LED wires are taken. So the result would be:

When Riding the LED's will be "ON".

When Charging or Resting the LED's will be disconnected.

When a Cell runs low a connected LED will go "OFF".

And you could even add on your CHARGING connector power wires their OWN LED's that are rated at the higher 4.25 volt range so that when the cell is charged you could know when it's done too because it goes "ON" when full. :wink:

This wins the:

K.I.S.S. Award for the Most Minimal Design

 

[curious]

I still don't understand what the optoisolator is needed for. Is it to prevent leakage (unnecessary energy loss when the battery is sitting idle) or is there some other reason?

Why?

Most opamps/comparators input voltage swing is limited by power supply voltage. There are exceptions that have "over the top" input capability e.g. LT has one (don't remember the p/n). So you have to divide the voltage from each cell tap by say 1:10 (with enough precision) for a 50V pack if you power your opamp from 5V. Now this problem does not exist if you power the opamp/comp from it's own cell and do not need a common LVC output referenced to ground (for throttle control or something).

I've came up with a economical circuit (but not tested it yet) that determines the voltage of the *lowest voltage* cell in a pack and outputs it as an analog signal. With some minor mod it can also indicate the cell with the lowest voltage. The same circuit can be adopted to determine the *highest voltage" cell as well. If anyone is interested I can post it here.

 

[safe]

I've came up with a economical circuit (but not tested it yet) that determines the voltage of the *lowest voltage* cell in a pack and outputs it as an analog signal. With some minor mod it can also indicate the cell with the lowest voltage. The same circuit can be adopted to determine the *highest voltage" cell as well. If anyone is interested I can post it here.

Hey by all means post it here. I know I'd really like to see EVERYTHING that I can and absorb it all. Recently I've been looking into the optoisolator concept since many here are very excited about it and I think I'm beginning to see the value of it after spending some time learning "from scratch" exactly WHY doing things with comparators is annoying and actually pretty expensive when you count up all the parts you need. These optoisolators are pretty cheap... in the $2.47 price range which is actually CHEAPER than buying an Differential Amplifier or a handful of comparators and resistors.

So yes... post what you have.

http://digikey.com/scripts/DkSearch/dksus.dll?Detail?name=PS8602-A-ND

P.S: Does anyone know where you can download SPICE files for the optoisolators? Without the SPICE file I can't load it into my software simulation programs and if I can't do that I might as well be living in a cave. :lol:

 

[curious]

Here is the schematics for 3 cells showing the idea. I have to run for the day so I'll do some explanations tomorrow. For now suffice to say that A1 is a 4000-series CMOS AND gate (I do not have an appropriate symbol in LTSpice) used in a non-standard quasi-linear mode. Also this particular version requires an isolated 12V power supply (I planned to use DC-DC converter anyway for lights, relays and such) but can be modified to work without additional power supply with only few extra parts.

 

[safe]

Wow, it looks like you aren't even using an optoisolator and instead are just using resistors and transistors. This is one I'll have to practice with in my SPICE based simulation program. Resistors and transistors are built in so I'd have no worries trying to find the right download to simulate the optoisolator.

Looks like A1 is just a wildcard in your diagram so I'll have to wait for more info about it. Anything other than the basics will require a download of a SPICE file, so hopefully they are available for the component.

4000-series CMOS huh? Okay... something new to learn...

 

[curious]

Ok, here is an explanation. First of all D4-D6 can be safely deleted - these came from a different revision of the circuit where they were actually needed.

V4 is the 12V DCDC converter that I plan to use for aux power that creates a -12V rail in reference to battery ground. Upper PNP transistors Q1,Q2,Q3 with corresponding resistors R1,R2,R3 form voltage to current converters (using a standard constant current source circuit). Each cell voltage is converted to corresponding PNP transistor collector current that can be then translated to (measured at) any reference voltage as long as Vce limit of the transistor is not exceeded. The load of each voltage current converter is another voltage to current converter at the -12V rail. A pair of cross-loaded voltage to current converters create a voltage comparator with the output at connected collectors. This circuit however has very high output impedance so for a reasonable comparator gain the next stage must have very large input impedance - mosfet input makes an ideal choice. Note that Vbe voltage drop of the upper transistor is compensated by Vbe voltage drop of the lower transistor so the voltage error is comparable to discrete differential pair (LTP) (tens of millivolts). An upper/lower pair of resistors must be matched (1%) but their specific value is not critical (I picked 1 megohm because I was working on ultra-low power version first).

The AND circuit uses a decades old trick that makes simple CMOS logic gates (except for ones with built-in hysteresis) work as a fairly linear amplifier by adding negative feedback between an input and an output. Selection of 4000 series vs something less old like 74HC is based on wider supply voltage range. With negative feedback formed by voltage inverting Q4,Q5,Q6 the AND gate output settles at the voltage level such that all but one comparator circuits are in high state (those that have higher voltages and thus generate higher current in upper transistor collector) and the remaining comparator output around the threshold of the CMOS gate (12/2 = 6V). The voltage at the Q4,Q5,Q6 bases would then be equal to the voltage of the lowest voltage cell.

I have doubts this circuit can be simulated in Spice as is though because of non-standard use of a logic gate. If you want to simulate something I can probably quickly hack a discrete mosfet implementation of the AND gate (full complementary thing is not needed so it is much simpler).

Few notes:
1. CMOS logic has built-in clamp diodes so there is no need in additional voltage protection.
2. AND gate width should match the number of cells, multiple gates can be compounded for necessary width.
3. A small cap most likely is needed in parallel with R7 to prevent oscillations in the circuit.

 

[safe]

I have doubts this circuit can be simulated in Spice as is though because of non-standard use of a logic gate. If you want to simulate something I can probably quickly hack a discrete mosfet implementation of the AND gate (full complementary thing is not needed so it is much simpler).

I can do the logic gates in SPICE. If I can't run the overall program using SPICE models then I'd be less confident in it actually working right. Simulations are sort of the "proof of concept" before building it.

It's been very difficult finding optocoupler SPICE models. I have found one, but it's not text, so I would have to type all this in manually. What a hassle... (but I'll likely do it if nothing can be found)

Anyone?

Optocoupler SPICE models as text?

 

[safe]

Eureka!

I just found an optocoupler SPICE file and loaded it and it appears correct. (will update with actual simulations later)

Here's the file:

*
* Library of optocoupler models

* Copyright 1991 by MicroSim Corporation
* This is a reduced version of MicroSim's Opto-coupler components library.
* You are welcome to make as many copies of it as you find convenient.

* The parameters in this model library were derived from the data sheets for
* each part.

*.model 4N25
* 6-pin DIP: pin #1 #2 #4 #5 #6
* | | | | |
.subckt A4N25 pin1 pin2 pin4 pin5 pin6 params: rel_CTR=1
* Motorola pid=4N25
* 88-01-04 pwt
* 88-01-18 pwt rework Cje approximation

* The data sheet used for this model is from Motorola: it was the most
* complete for DC and switching parameters, and is was easy to find the
* component IR-LED and phototransistor as separate devices for further
* specifications.

d_MainLED pin1 pin2 MainLED
d_PhotoLED pin1 1 PhotoLED .001
v_PhotoLED 1 pin2 0

f_TempComp 0 2 v_PhotoLED 1
r_TempComp 2 0 TempComp {rel_CTR}

g_BaseSrc 5 6 2 0 .9
q_PhotoBJT 5 6 4 PhotoBJT
r_C 5 pin5 .1
r_B 6 pin6 .1
r_E 4 pin4 .1

* Since active devices dominate pin-to-pin capacitance on each "side" of the
* optocoupler, isolation is modeled by identical capacitances and resistances
* linked to a common point; this gives isolation of .5pF and 1E+11 ohms
c_1 pin1 7 .4p
r_1 pin1 7 .12T
c_2 pin2 7 .4p
r_2 pin2 7 .12T
c_4 pin4 7 .4p
r_4 pin4 7 .12T
c_5 pin5 7 .4p
r_5 pin5 7 .12T
c_6 pin6 7 .4p
r_6 pin6 7 .12T

* Similar to Motorola MLED15.
.model MainLED D(Is=1.1p Rs=.66 Ikf=30m N=1.9 Xti=3 Cjo=40p M=.34 Vj=.75
+ Isr=30n Nr=3.8 Bv=6 Ibv=100u Tt=.5u)

* Models photon generation: same as MainLED except no AC effects, no breakdown.
.model PhotoLED D(Is=1.1p Rs=.66 Ikf=30m N=1.9 Xti=3 Cjo=0 M=.34 Vj=.75
+ Isr=30n Nr=3.8 Bv=0 Tt=0)

* Temperature compensation for system: 1.38x @ -55'C, .54x @ +100'C, all @ 10mA
* Note: the photo BJT has its own temperature corrections, which must be kept
* as the transistor is electrically available.
.model TempComp RES(R=1 Tc1=-11.27m Tc2=43.46u)

* Similar to Motorola MDR3050; Hfe=325 @ Ic=500uA, Vce=5V
* Use beta variation (w/Parts) to model change in current-transfer ratio (CTR).
* Hand adjust reverse beta (Br) to match saturation characteristics.
* Set Isc to model dark current.
* Hand adjust Cjc to match fall time @ Ic=10mA (which yields rise time, too).
* Hand adjust reverse transit-time (Tr) to match storage time @ Ic=10mA.
* Delay time set by LED I-V and C-V characteristics; set Cje to 25% of Cjc,
* inspection of phototransistor chip layouts show the emitter area is 20%-25%
* that of the collector area. The same layouts show that base resistance is
* made negligible by design; also, the operating currents are small.
* Hand adjust forward transit-time (Tf) to match MDR3050 pulse data. Check
* against 4N25 frequency response (Fig 11, 12).
.model PhotoBJT NPN(Is=10f Xti=3 Vaf=60
+ Bf=400 Ne=3.75 Ise=580p Ikf=.26 Xtb=1.5
+ Br=.04 Nc=2 Isc=3.5n
+ Cjc=10p Mjc=.3333 Vjc=.75 Tr=88u
+ Cje=2.5p Mje=.3333 Vje=.75 Tf=1.5n)
.ends

*.model 4N25A
* 6-pin DIP: pin #1 #2 #4 #5 #6
* | | | | |
.subckt A4N25A pin1 pin2 pin4 pin5 pin6
* 88-01-05 pwt
* Same as 4N25 (UL recognized).
x1 pin1 pin2 pin4 pin5 pin6 A4N25
.ends
*

 

[curious]

If you download a free LTSpice it has several optocoupler models for your simulation pleasure.
For non-believers in CMOS witchcraft here is a discrete version that simulates just fine:

 

[curious]

And without further ado, the version of the above with a LED indicator of the lowest voltage cell:

 

[safe]

Problems with Optocouplers

I was reading in some pdf file for an Optocoupler that they warn that the LED's inside the circuit will degrade by roughly 50% over the course of five years of continual use. That means that before a pack is even dead (we hope) it will already begin to deviate from the original spec by a wide margin. The deviation might become noticeable within months of creation of the overall circuit.

This is a serious problem...

I hope Bob Mcree has thought about this one... the voltage that you get from the LED inside the optocoupler is going to sag and get worse and worse over time.

Oh wait... he's very experienced I'm sure he's found a way to deal with it...

 

[Ypedal]

2000 hrs / 24 = 83 days. Spread over 5 years.... i don't see this as much of a problem.

 

[curious]

I hope Bob Mcree has thought about this one... the voltage that you get from the LED inside the optocoupler is going to sag and get worse and worse over time.

Bob's circuit is perfect for what it is intended for. The optocoupler is used *after* the voltage detector in the binary mode to signal the LVC condition so it is neither subject to degradation (it is only turned-on during LVC) nor does the degradation matter for the circuit.

OTOH if you are considering using optocoupler to pass an analog signal you have to deal with both (i) non-linearity, (ii) degradation of the optocoupler. I'd recommend against it.

 

[mcstar]

If you're really worried about the degredation of the led component, then you can just put a socket on your pc board when you assemble the thing. That way if the component starts to age, you can just pop it out and replace it, like you would a fuse or light bulb. Another approach is to just reduce the current through the LED with a series resistance. You may need to compensate by increasing the gain on the output side, but this approach substantially increases the LED's lifetime.