Thermal cut-out temperature for 24 fet controller

methods

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Would anyone care to float an opinion on what temperature I should set the thermal cut-out for?
My first inclination is to set it somewhere between 80C - 100C
The sensor will be mounted to the heat sink via a TO220 package.
This is for my upcoming run of 420 controllers.

Speaking of which... I dont suppose anyone knows which heat sink is the PWM sink on a 24 fet (or if they both are)....

My goal is to set the thermal limit low enough that it will annoy a person who mounts the controller in a non-ideal spot. I want to encourage folks to get good cooling for the extra bit of margin it adds. So.... by that thinking perhaps 70C might be closer to what I want.

-methods
 
About somewhere in the middle and make it 75C. Kinda what Captain115 suggested.

My RC controllers shutdown at 200F.
 
You want to keep die temps below 170C.

For a TO220 package going through a thermal pad, you're looking at a real-world ~0.7C/W + 1C/W (pad). Call it 2C/W to figure on that package that didn't get screwed down as snugly as the others, or had a wrinkle or spec of solder under the pad etc.

If each device is averaging shedding 40W of heat, then you're looking at a 90C offset from die temps to heatsink temps. Then the heatsink will have a few degree deltaT to where your temp sensor is.

I think 80C would be the highest you would ever want to see the sink reach if you wanted any reliability IMHO. I still think it will be possible to have thermal failures on FETs with the heatsink never exceeding 80C.
 
liveforphysics said:
I still think it will be possible to have thermal failures on FETs with the heatsink never exceeding 80C.


Me too. Heatsink temperature is a lousy indicator of instantaneous FET die temperature. I bet 90% plus of FET failures in our controllers occur without the heatsink getting hot.
 
Jeremy Harris said:
liveforphysics said:
I still think it will be possible to have thermal failures on FETs with the heatsink never exceeding 80C.


Me too. Heatsink temperature is a lousy indicator of instantaneous FET die temperature. I bet 90% plus of FET failures in our controllers occur without the heatsink getting hot.


That's a fact. Most of my epic controller failures occurred with a cold to the touch heat-sink. These little TO220 packages really just don't have a low enough Rth to know die temp from any method other than measuring Rds.
 
liveforphysics said:
Jeremy Harris said:
liveforphysics said:
I still think it will be possible to have thermal failures on FETs with the heatsink never exceeding 80C.

Me too. Heatsink temperature is a lousy indicator of instantaneous FET die temperature. I bet 90% plus of FET failures in our controllers occur without the heatsink getting hot.
That's a fact. Most of my epic controller failures occurred with a cold to the touch heat-sink. These little TO220 packages really just don't have a low enough Rth to know die temp from any method other than measuring Rds.
Measuring case temp is a great way of determining the die temp (if power being dissipated is known) and it's the industry standard. It's worked wonderfully for me. Just drill a tiny hole through the heat sink to where the "rear plate" of the FET mounts against the sink. Filling the hole with either thermal epoxy or, in my case, phase-change thermal compound (locks the thermocouple back in place when it cools) ensures good conduction of heat. Insert the thermocouple until it pops out of the hole a few mils and then mount the FET.

While very worthwhile when testing a new commercial design, I do admit it might be a bit much for most folks to do just to get an accurate die temp. :mrgreen:
 
liveforphysics said:
Jeremy Harris said:
liveforphysics said:
I still think it will be possible to have thermal failures on FETs with the heatsink never exceeding 80C.

Me too. Heatsink temperature is a lousy indicator of instantaneous FET die temperature. I bet 90% plus of FET failures in our controllers occur without the heatsink getting hot.

That's a fact. Most of my epic controller failures occurred with a cold to the touch heat-sink. These little TO220 packages really just don't have a low enough Rth to know die temp from any method other than measuring Rds.

Drain to source breakdown voltage increases as the mosfet gets warmer. I've seen both failure modes in my controllers, the first is overtemp due to too much current and the second (with a cold to the touch heatsink) seems to be a case of breakdown leading to shoot-through. (Breakdown induced by hard load leading to high positive swings). Some of my friends measured breakdown voltages of their fets to be 107V at 20 degC and 117V at 140 degC (one of the TO247AC IR hexfets, not sure what one).

About temperature of die, there is one no miss way to measure this - and that is measuring voltage drop over the fet with known current. Then you have RDS on and that is very temperature dependent, leading to exact temperature readings. How? Not sure, maybe a diff amp?

I've tried for a while now to build a 'idiot proof' controller for sale, but it is damn hard. After trying many things, one "algorithm" that seems to work ok is measuring positive swing (If too high - lower current limit). This protects nicely against capacitor failure, one failure that brings down many components with them =/

Anyhow, my biggest headache is people, stupidity and/or lying. Recieving a blown protype, I asked him what voltage he's been running it at? not near 70V, as i asked him not to pass. 5 minutes later I'm reading 92V from the eeprom and max read spike of 140V (my S&H circuit just about holds the voltage a bit lower than what I see on my scope with fets just running in avalanche).

Adding another N-fet just to totally shut down the controller if more than allowed voltage is connected, I'm seriosly considering it :?
 
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