Yet another DIY BMS

[S.B.D]

Hi,

Combining my love to electronics and EV, I started designing and simulating a general purpose multi chemistry 16 cell BMS.
Main issue I worked on the past couple of days was the transconductance amplifier to bring each cell voltage to ground reference to be measured by the MCU ADC.
My goal was a target price of 0.5$ per cell including op amp, transistors, resistors and caps. I'm pretty much below that...
I got good results on the SPICE simulator. MAX voltage error less than 0.5%.
I have some questions regarding the BMS power consumption.
What should be the average power consumption of the BMS circuit when not balancing the cells?
What should be the power source of the circuit? Full pack voltage or partial pack voltage?

Your insights are appreciated.

Thanks,
S.B.D

 

[circuit]

Supply source should be full pack, ilde current to more 50µA. To my taste, anyway.

 

[dermot]

I agree that it should be powered from the full pack voltage, else you risk unbalancing the cells - even if only a little.

As to standby current consumption, think about the practical realworld use.

Firstly, let's assume a 10AH pack capacity.

Now I wouldn't be too upset if my pack lost 1% of its charge in a month to power a comprehensive BMS that was going to protect $1000 worth of cells, so 150µA would more or less meet that level. I suspect that is of the same order as self-discharge anyway.

Lower is better, of course, I guess you could consider power-saving measures such that the overvoltage/balance functions were disabled except during charging - that should save you some µAH.... (but not if you use regen, of course).

I hope I've not dropped any decimal places in my mental arithmetic, but I have just had a couple of pints of ale to bid farewell to a colleague who has just retired...

dermot

 

[S.B.D]

Thanks for the feedback.
The voltage to current op-amp circuit will at most consume around 100uA from each cell.
Now I see 2 problems:
MCU will consume much more power, but this can be handled by changing from sleep mode (around 1uA) to working mode (around 3-5mA) while sampling when pack is not used (charge or discharge).
My bigger problem is that I can't seem to find a high voltage (>75V) LDO or step-down switcher that has a low Iq (self operating current).
I need to put my mind into this. Maybe a low current zener based regulator??? :?
Any help is welcomed.

Thanks,
S.B.D

 

[SamTexas]

Good to know there's another BMS being designed.

My goal was a target price of 0.5$ per cell including op amp, transistors, resistors and caps. I'm pretty much below that...

What does that mean? Are you saying that the total part cost for a 16s BMS is $8 or less? (0.5*16)

What should be the power source of the circuit? Full pack voltage or partial pack voltage?

Please don't ever consider partial pack voltage.

BMS is a very broadly defined term. What are the functions supported by yours? Here are the two features I desire most in a BMS:

1) Boost not bleed when balance charging: Every BMS (and lithium charger) I know throws away energy in order to balance cells. It's the status quo and it's stupidly crazy! Since the BMS has control of every single cell, why not boost the weaker cell(s) instead? Benefits: a) No energy wasted. b) no need to worry about the BMS ever getting hot.

2) With the exception of the Fletcher/Goodrum BMS, all BMSs monitor the discharge rate (to honor/protect the battery's C-Rate). This function is completely redundant in ebike application. Each ebike already has a controller with a current limiting ability. So let the controller deal with that. Benefits: a) cost. b) same as above: no worries about heat.

Good luck with your design. I hope you'll follow through to at least a working prototype.

 

[S.B.D]

OK,

Found this nice voltage regulator from Micrel, MIC5281- 6uA Self operating current, 120V input, 25mA output.
Need to calculate thermal dissipation on the regulator and see how much current I can squeeze out from it.

SamTexas, when I started simulating the op amp circuit I was afraid of the total cost (per cell) so I limited my budget to 0.5$ per cell.
Another must was to use easy to purchase components, all from a single vendor - I am currently looking for all components from Digikey.
I think total cost of all other components should be less than 20$ without PCB.

My design "unfortunately" will be a dissipative type, I am sure that if I start a capacitive or inductive approach I'll never finish it ....

Here is the transconductance amplifier schematic. Main goal, was to get the full cell voltage referenced to ground in order to use a the MCU's internal ADC and get enough resolution.



Thanks,
S.B.D

 

[S.B.D]

Hi,

Here is an updated schematic of the V to A amplifier. I fixed a problem I found when using this circuit to measure the differential voltage on the lower cells.
It will require now to multiply the ADC conversion result by 2.
I also added the discharge circuit and a voltage source simulating the MCU IO control.
Most important is the LED that will light up when balancing a cell ....

Since I'm using LTspice I am limited to the available components by the sim. All transistors, Mosfets and the Op amp will be replaced to components with similar characteristics.



S.B.D

 

[Alan B]

Nice design. Looks like it would work.

Looks like the parts count is about the same as using a small micro per cell. The current being drawn from the cell is higher. And not completely balanced per cell. Some of those resistors will have to be pretty precisely matched to get good common mode rejection.

 

[S.B.D]

Hi Alan B,

Thanks for your great remarks. Yes, I am a bit frustrated by the necessary part count (as I'm the one who will have to solder it... ).
Taking your wise words, maybe a PIC12 is the way to go...
All PIC12's work down to 2V, some have internal 0.6 bandgap reference to measure the MCU's VCC (the changing cell voltage), 6 IOs to play with.
--ADC input for voltage measurement.
--ADC input for MCU ID (needed for serial bus communication)
--IO for DC blocked bi-directional one wire communication pin
--IO for MOSFET gate drive
-- IO for possible needed ext. voltage reference
-- Unused IO

Need to think on how to program all of them in circuit.

Again, thanks for the insight.

Back to the drawing board...

Here is a sim of the DC blocked communication bus I just did, a 1ms pulse is seen great at the two RX points.
--V1 & V2 battery cells
--V3 MCU TX pin
--R2,R3 MCU RX pin






S.B.D

 

[Alan B]

There are some threads on MPU per cell BMS designs here on ES. Both PIC and AVR. Some of the AVR go down to 1.8V and have what is needed.

 

[S.B.D]

Hi,

I require your wise words on a couple of issues I'm facing with the BMS schematics.

First, does anyone know the JST connector family that's used in many BMS designs? I require a 17pin connector for my 16S design.

Second problem I'm facing is the protection MOSFETs connection scheme. With the discharge protection schematics I'm comfortable with. Using logic gate N-Ch MOSFETs (currently only one MOSFET is shown) the MCU will give a logic high to Q10 gate and the discharge path will open. My problem is with the charging path...Q11's source is facing the charger negative terminal and when the MOSFET is closed (high impedance) the source terminal is basically floating with respect to circuit ground.
Currently I put the gate pull down resistor between the gate and circuit ground, but I'm afraid that since Q11 source is "floating" I do not have any assurance that a logic high from the MCU will open Q11.

Can I take into consideration that when the Charger is connected the potential on the "floating source" will equate through the positive terminal?
By this I mean that if the battery pack is X the charger must have a larger voltage across it, so if the positive terminal of the pack and the charger are tied together Q11 source potential must be negative with respect to circuit ground.
Meaning that 5V from the MCU IO will always generate a Vgs greater than 5V?

I hope my problem is explained properly, an English is not my native language.

I attached this part of the schematics showing the charge and discharge protection MOSFETs, shunt resistor and current amplifier.



Thanks,
S.B.D

 

[Flip101]

Hey S.B.D.

I am currently trying to design my own BMS for GBS-40 LiFeMnPO4 batteries and I was wondering if you could provide me with any pre-existing schematics that I could model my design off of or at the very least give me some solid material to research in order to accomplish the task of building a charge circuit for the battery cells. Would you beable to send me your spice model as well?

Any help that you can give me would be greatly appreciated because I'm having a hard time gathering this type of information regardless of the research that I do on the topic. Ideally
I wish to obtain a pre-existing design that is proven and works because I want to avoid damaging these cells.

Thanks for your time.

 

[S.B.D]

Hi Flip101,

As of now I am in the middle of my schematic design, nothing to share yet. You can follow this thread as I will put here as much material as I can.
I'm sure that a better search will provide you with plenty of reading material.
For a project like this you require more than basic - power,analog and digital electronic know how.


Basically my schematics will have 4 major parts:
1- Power supply
The power supply needs to supply the digital electronic parts with 5 volts from a fully charged 16S source.
This is a massive voltage drop and heat will build up on the regulator very quickly with every milliamp the circuit sinks.
For example, full pack voltage will be around 60V meaning a 55V voltage drop from input to output. Taking into account a 15mA worst case current consumption this gives 55*0.015= 825mW of heat.
The LDO I plan to use will not be able to dissipate this kind of heat so I plan to solve this by bringing the MCU to minimum current consumption and also adding a series power resistor to share some of the voltage drop and heat dissipation.
I picked the specific LDO by its max input voltage and its low self current (the current it sinks with zero output current) because you do not want to drain the battery pack with this circuit.
I am still looking into having 2 voltage rails 12V for proper Vgs of standard power MOSFETS (that I have plenty of) and adding a 12V to 5V regulator for the electronics.
Another way is having a single 5V rail and using logic gate power MOSFETs for the protection circuit.


2- Microcontroller
The Microcontroller I use is a PIC18 as I have all the programming hardware for it and have written in the past all low level code for the MCU peripherals I need. I program it in C. The MCU will use the internal 10 bit Analog to digital converter to monitor the cell voltages, temperature, charge and discharge currents.Digital I/Os will be used to control the discharge and protection MOSFETs. This MCU has also an internal USB interface that I plan to use to configure the BMS parameters and log the charging of each cell on the PC.


3- Single Cell Unit x 16
The single cell unit has two parts. One is the transconductance amplifier to reference each cell voltage to common ground so the ADC can sample it. Second is the discharge path having a power resistor, power MOSFET and level shifting MOSFET for the MCU to control the discharge path (posted above).... and most important an LED ....


4- Protection MOSFETs
The protection MOSFETs are controlled by the MCU to protect the battery pack in case of cell over/under voltage, large cell voltage difference, over current discharge and over current charge - many more features can be added.


Hope this gives you some start...

S.B.D

 

[S.B.D]

Hi,

Just finished the schematics of my DIY 16S BMS.
Some overview:

- All parts I used I have on hand from other projects, this is the reason I used a low pin count MCU and added 2 shift registers as IO expanders and an analog MUX to sample the 16 cell voltage.
- The MOSFETS in the design need to be replaced to logic level MOSFETs.
- The 17 pin connector is not defined - still can't find a P/N for a nice right angle friction lock connector
- The TX and RX connectors are future options to connect 2 boards together and do something ....
- Some resistor and capacitor values are not final.
- Op amp P/N may change to lower the Current consumption from each cell. It can go down to 2uA (or even lower, just a matter of money...)

Although I had many thoughts on making a generic cell unit and a master controller, I decided to go with the strait forward approach so the project will be finished.

I would love to get your insights on the schematics. I will be happy to answer any questions.

Please read the disclaimer first.

--------DISCLAIMER--------
NOT FOR COMMERCIAL USE
This is an initial design and it has
not been tested or verified.
Use it at your own risk.
I do not take any responsibility for it.
Beware!!! Improper use of batteries may cause them
to fail or catch fire that may lead to property
damage or serious body injury.

Thanks,
S.B.D

 

[S.B.D]

Hi,

Started the PCB layout of my BMS. During the past week I've been working on building the new footprints for the layout.
I started playing around with component placement of a "Cell Unit" - Voltage to current amplifier and the discharge circuit.
Then I found a mistake in my schematics. The op amp's decoupling capacitors are connected to the op amp's VCC pin and to common ground - not to the cell's negative terminal.
This is fixed in the attached schematics.

I still can't find a source for 17 pin balancer connectors - Any help .... ?

View attachment 16S_BMS_SCH.pdf



S.B.D

 

[hardym]

This looks promising. A couple of comments

I’ve noticed the R values around the Zener (e.g. R146/R152 ) will need to change depending on where you are in the stack. Would be good to make a chart of the R values needed both across the Zener and below for each cell.

A regular quad op amp can take between 24-32 volts vcc. It seems that your design part count and cost could be reduced with a surface mount quad op amp, supporting multiples of 4 cells. This may also reduce the overall current consumption. For less than multiples of 4 cells, perhaps have a solderable shunt for the op-amp vcc.

I’ve built a few BMS’s based on the LTC6802. One problem was that the power resistor on each cell (e.g. R155 7.5 ohm), if enuf watts, will likely be wirewound, or have some inductive component. Suggest leaving room on the first few boards to add a diode across the power resistor to catch the reverse spike when switched off. (The lack of this single component destroyed many of the LTC8602 boards).

Accuracy may also be a concern. The voltage measurement accuracy is dependant on the accurancy of VCC into the PIC, which may be volitile with all the parts dependant on 5V supply. Rather, suggest hanging a ~4.5V Zener into the PIC V+Ref pin and using that as the high reference ADC point which will be near 1% accurate. The 100K resistors on this latest schematic are already marked as 1%, but expect a 1% x 2 error from this. The next area of accuracy is the 10 digit ADC in the PIC. It sounds like a lot but at +/1 LSB sample error and 5V / 1023 sample = 5 mV error from the ADC (which will coorelate to 10mV error in this design). You can increase the accuracy in software by an additional bit by oversampling, adding the samples, the dividing the result by the number of samples. Every bit helps.

There is an opto-isolated TX and RX on the schematic, that I assume is for external serial comms. Suggest connecting these to the TX and RX on the PIC. Using the internal serial buffer for incomming and outging serial comms is very helpful.

Power consumption may also be an issue depending on how much the pic is working vs sleeping. The 5V shunt regulator has to take 64 volts down to 5 volts. If all the 5V components utilize even 20 mA, this will be over 1W lost all the time in power conversion. Some BMS cheat by hooking the Vcc of the regulator to, say cell #4, to reduce the voltage drop, but this leads to imbalanced cells if not balanced regularly. Another option is a switching regulator, somethink like this: http://www.gravitech.us/35v1aswvore.html, but this one only takes up to 40V.

Also, check the layout on pin 6 of MIC5281-5.0YMME (fixed voltage). It looks like yoiu used the FB connectinos for a MIC5281YMME (variable voltage). Pin 6 should be SNS, and fixed to the output. http://www.micrel.com/_PDF/MIC5281.pdf

Best of luck.
Mark.

 

[S.B.D]

Hi Mark,

Thanks for the great insights. As I wrote in a previous post, some resistor values are not calculated yet and are there for layout only.
The zener diodes I use have a 50uA zener current, so I don't think it will be a problem for the higher voltage cells. I do still need to check the first couple of cells to see if enough current is available to stabilize the zener voltage.
I want to stick with single SOT-235 op amps as there is a huge variety of them. Currently I plan to use a Microchip's op amp that has a 2uA operating current and an offset voltage of 1mV - this at around 0.5$ per amp. This can be lowered to 0.2$ if 150uA is tolerable.
You are right about the VCC accuracy, I plan to use the PIC's internal voltage reference of 4.096V (1.024V band gap multiplied internally by 4). As you stated I do plan to oversample all analog samples and average them.
I do have some worries regarding the PIC's power consumption. I plan to have USB communication for configuration and logging while charging.This requires the PIC to work at 48MHz (12MIPS) - very wasteful for this application. I'll need to check if I can work with a slower internal clock when USB is not attached and move to the 48MHz clock if the USB cable is connected. I did want to dedicate an IO just for this but I ran out of them...

The MIC5281 layout is ready for both options, fixed and adjustable outputs. I plan to buy the fixed version and assemble R2 as 0R and not assemble R4. If the adjustable version will be available I will assemble the necessary voltage divider. As I have some uncertainty regarding the power dissipation on the LDO I added a 3W series resistor to take some of the power load.

I will add a free wheeling diode as you suggested in parallel with the 3W resistor.
This is the one I plan to use:

http://parts.digikey.com/1/parts/778599-res-7-5-ohm-3w-5-metal-film-erx-3sj7r5.html

I hope you now have a better understanding of my design assumptions - if I am right or not... time will tell...

Still stuck with the 17 pin connector :? ....

I really appreciate the time you took to go over the schematics!

Thanks,
S.B.D

 

[Alan B]

DB25's work well.

 

[S.B.D]

Hi,
I added free wheeling or circulating diodes to the design.
As Mark pointed out, the power resistors may have enough inductive element to generate a voltage spike that may damage the P-CH discharge MOSFETs.

View attachment 16S_BMS_SCH.pdf

Thanks,
S.B.D

 

[hardym]

Many smaller BMS use the JST-XH. This 16 cell BMS design already has a connection from the battery neg to the control fets, so only 16 more wires to the cells are necessary. Suggest this 16 position JST-XH:
http://search.digikey.com/us/en/products/S16B-XH-A(LF)(SN)/455-2229-ND/1651027
Also, When you do the layout, consider how jumpers could be installed to utilize less than 16 cells.

With regard to clock, the current design uses an external oscillator, consuming 2 precious PIC pins. http://ww1.microchip.com/downloads/en/DeviceDoc/41350E.pdf Figure 2-1 shows that high speed USB clock can be sourced from the internal 8Mhz clock X 4 PLL = 32 MHz which I guess is close enuf for microchip. Using the MUX, the PIC internal clock can still run a slower speed to save power.

If you send out to burn boards, I'd like one too.
Mark.

 

[S.B.D]

Hi Mark,

Your right that 2 pins are very valuable in this low pin count PIC, but for USB communication a crystal oscillator is a must.
I am using this PIC in a different design I started a few month ago and than sent a question to Microchip support. They replied that at this point a crystal oscillator is mandatory to be USB full speed complaint.
The jitter using the internal oscillator is the main problem. Although I'm not looking to be USB compliant, I read more threads on this issue and all stated that anything else than a crystal makes USB connections fail and disconnect.

I do want to go with the 17 pin balancer connector approach, as this will eliminate the voltage drop on the high current negative line by using a high impedance tap for voltage measurement.

I was looking this week at the JST-XH as you suggested, I saw that the next size is a 18 or 20 pin version, but could not find where to source them. I will give it some more time this week.

S.B.D

 

[texaspyro]

I was looking this week at the JST-XH as you suggested, I saw that the next size is a 18 or 20 pin version, but could not find where to source them. I will give it some more time this week.

Whoever started with using JST's as balance connectors should be shot. They are totally inappropriate for the application. They are not designed for multiple mating cycles. Use a DB-25 and all your connector problems will go bye-bye (and they are dirt cheap).

 

[S.B.D]

Hi,

Took the DB25 advice and added it to the schematics. This gave me some extra pins that I will use for the external thermistor and board to board communication option.
I also added option resistors to bypass the optocoupler in a board to board communication scheme (Master pcb will have the Opto and the Slave pcb will have the resistors), not sure this is the best way... Will give it some more thought now that the connector issue is done .

View attachment 16S_BMS_SCH_0_3.pdf

S.B.D

 

[S.B.D]

Hi,

Found some time yesterday to continue the PCB layout. Grouping the components took a long time...
I hope that in a week or two I can send the boards to production.

I would like to get your opinion on what should be the outline of the board - More rectangular shaped or square shaped?
I would like it to fit nicely besides cylindrical cell packs and LiPo packs.



Thanks,
S.B.D

 

[Alan B]

Lipos have JST-XH balance connectors, and are generally paralleled in 5 or 8 amp hour blocks 4-6 cells each, so some place to land those is important for Lipo builds.