dak664 said:
"Safe" was posting earlier about using different dividers with the MCU doing the subtractions. I think straight ADC measurements would have been too noisy and the cumulative errors would end up too high. Your method of inverse PWM might solve that problem, but I think most everyone wants the BMS to be able to shunt current around charged cells as well.
Yeah, I read a lot of that part of the thread. I don't think his method would ever work, using the non-ideal dividers and analyzing the whole circuit. That's a massive linear algebra problem, no way a little 8-bit PIC would stand a chance and you'd probably want to shoot yourself trying to program it. Using the op-amps is critical so you can do some hand-waving and make lots of ideal assumptions. The inverse PWM reduces the part count somewhat and avoids costly parts like analog muxes or high-voltage op-amps.
You're right, I didn't address the shunt side of things, just the voltage measurement.
I just had a bit of a brainstorm. How about something like this:
https://ec.irf.com/v6/en/US/adirect/ir?cmd=catProductDetailFrame&productID=IR21363S
More info here: http://www.irf.com/technical-info/appnotes/an-985.pdf
IR21363, a 3-phase motor drive IC. It has three low-side drivers and three floating high-side drivers, with a built-in bootstrap to provide the necessary gate drive voltage. You could use one of those ICs to drive shunt bypasses for a 6-cell block. That's not the designed configuration, but each driver operates independently so it can be used this way. It's designed to take TTL or CMOS level inputs, which would have to be ground-referenced to the bottom of the 6-cell block. So, it doesn't totally get around the problem for something like a 24s pack, but it does allow a single uP to control a larger block of cells that it could handle by itself. Those IRF parts are about $3 so that's $0.50 per cell, not bad.
OR, You could use one of these for each cell:
https://ec.irf.com/v6/en/US/adirect/ir?cmd=catSearchFrame&domSendTo=byID&domProductQueryName=IRS2117SPBF
That's a single-channel floating driver. So, you could use 24 of those to control bypasses on all 24 cells from a single reference at the bottom of the pack. They're about a buck each, which isn't bad, but it's not super elegant and each one needs a couple external components. And you'd need a uP with 24 outputs to control the whole shebang. Not great.
Actually, I take that back, too.
Problem: controlling N shunts requires N outputs. You can't mux them because you need more than one on at once, it could be any arbitrary combination from 0-N on simultaneously.
Solution: use a T or JK flip-flop to hold the state of each shunt. (For those without some EE background, here: http://en.wikipedia.org/wiki/Flip-flop_%28electronics%29#Toggle_flip-flops_.28T_flip-flops.29). All the shunts start in the off state. You use a mux with the appropriate number of channels to address the T output of each latch (or J and K together). When you want to turn a shunt on, address that channel to set T high, then issue a clock pulse (you can use one clock bus to connect all the latches) to toggle the shunt on, the flip-flop then holds that state. Another toggle will turn it off. Requires only log2(N)+1 outputs to control N switches, or 6 pins for 24s configuration.
Flip-flops are cheap 74-series logic, like $0.50 for a dual package. Total cost, IRF driver + flip-flop: ~$1.25-$1.50 per cell, no optocouplers or anything special required.
Whew. I think I'm done now.
