Arlo's power stage Leaf controller runs and drives page 103
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OK. SO I have 2x DC-DC supples. 12-15v and 12-5v and 12-12v this should let me build both mosfet with - turn off and igbts.HighHopes said:
Highhopes. With the miler clamp I don't think I will need to go as low for negative turn off what do you think?
I think for 4 mosfets in parallel I can run 0v off and no negative voltage as long as the miller clamp is a tight circuit.
And for the IGBTs with the miller clamp is -5 enough?
HighHopes
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+15V on / -5V off should be good enough. if you took leaf inverter to full potential of 100kW (module capability, not motor.. no idea what the motor is rated for) probably -5V will not be enough.. hard to ssay for sure.
true that parallel mosfet would be OK with just the clamp, no negative turn OFF, but ... since you want to use this one gate drive for both power bridge then its a bit of a mute question..
true that parallel mosfet would be OK with just the clamp, no negative turn OFF, but ... since you want to use this one gate drive for both power bridge then its a bit of a mute question..
The less - voltage I use the less stress I will have on the driver. So with 0-12 or 0-15 v with 4 parallel MOSFETs I might not need a boost stage right? I am not planning to high of voltage for the leaf motor. Most likely 112s max 470 volts fully charged or 417 nominal. If you think I will need more then -5 off then I will do it but I don't want to do this 2 times.
HighHopes
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wither your drive is +12V or +15V has nothing to do with needing a boost stage or not. the boost stage is there to reach the peak current. how much peak current do you need, you have to do the math and read datasheet.
i think for your large module you will need -5V off, yes. negative bias buys you even more margin which is needed as you go up in power. remember, as you go up in power the tolerance to noise gets less and less so you need to buy safety margin where you can.
for parallel mosfet, probably +15V ON, clamp off would be enough..but since you have ONE gate driver to support both bridges, then you have to take the more conservative design which is -5V off and use that for BOTH leaf bridge & parallel mosfet bridge.
what stress on the gate drive IC are you talking about? did you do some math to discover the part IS stressed? i think with boost stage transistor even switching 50khz with negative bias of 5V (20V across gate drive IC) there will not be too much stress.. but you have to do the math to find out.
i can not promise that doing this 2 times will be avoided.. we can only hope our best effort is enough.
i think for your large module you will need -5V off, yes. negative bias buys you even more margin which is needed as you go up in power. remember, as you go up in power the tolerance to noise gets less and less so you need to buy safety margin where you can.
for parallel mosfet, probably +15V ON, clamp off would be enough..but since you have ONE gate driver to support both bridges, then you have to take the more conservative design which is -5V off and use that for BOTH leaf bridge & parallel mosfet bridge.
what stress on the gate drive IC are you talking about? did you do some math to discover the part IS stressed? i think with boost stage transistor even switching 50khz with negative bias of 5V (20V across gate drive IC) there will not be too much stress.. but you have to do the math to find out.
i can not promise that doing this 2 times will be avoided.. we can only hope our best effort is enough.
So what I'm saying is the driver boards for the MOSFETs I can skip the negative gate drive to save a little heating in the gate driver. And no I have not done any math on it because I don't know what calculations to use for this.
With the right drive I will run a -5 or -9 volt off because its going to be a higher voltage design. But if you think the MOSFET design will work better with negaite supply and not change the stress on the gate driver then I will run it.
As well is is really important to run 15v on for the MOSFETs? Or is 12v ok. I have been watching and most of my experience has shown 12v is more then enough because is usaly more then 2x the miller plateau.
With the right drive I will run a -5 or -9 volt off because its going to be a higher voltage design. But if you think the MOSFET design will work better with negaite supply and not change the stress on the gate driver then I will run it.
As well is is really important to run 15v on for the MOSFETs? Or is 12v ok. I have been watching and most of my experience has shown 12v is more then enough because is usaly more then 2x the miller plateau.
liveforphysics
100 TW
Arlo1 said:
Get note3.
zombiess
10 MW
Arlo1 said:
Let me know if you need some help with the math. I have a spread sheet that does all the calcs that I created using notes from the many conversations with HighHopes.
Dimensioning the power supply requirements is pretty easy.
Idrive = Qg * fsw - Average Current supplied to the gate driver
Pg = Idrive * delta_Vdr - Average gate drive power required... this is the one you need to size the power supply.
To use the above you need the total Qg of the parallel mosfets/IGBTs, your switching frequency range so we can go with the worst case scenario and the delta of the gate supply voltage, sounds like 20V with +15 on -5 off.
HighHopes
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for leaf inverter i would use +15V/-8V and for parallel mosfet i would use +12V / clamp (or maybe +15V/clamp, depending on ease of part purchase and how much voltage drop you have between transformer & power mosfet); but i would wait for zombies to field test 4 parallel mosfets to make sure power levels are still low enough for clamp to work (sorry zombies, but you're going to have to rename your profile to Ginnie_Pig)
for the math, there are 3 things to look for with 3 different equations
1. what is the peak current which tells you if you need a boost stage or not. has other implications too
2. what is the average power which tells you the watt rating of the power supply (size of transformer in isolated DC/DC converter)
3. what is the temperature rise of the gate driver IC (usually this one is not even on my list as i am not concerned but in your case i am). 105degC chip max, this means your worse case temp rise with ambient at 40C is not allowed to be higher than 105C - 25C = 80C. so.. ambient at 40C, operational max at 80C, this means your temp rise due to power dissipation is 40C so keep that in mind.
from 1 & 2 and also some additional factors you will get watt requirement of gate resistor. additional factors.. hard to cool these resistors, applying pulsed current but probably you chose resistor type that are not pulse rated (cheaper) for mosfet board.
my feeling is that your leaf inverter at 20khz will need some big watt value gate resistor and because peak current are high the path inductance is going to matter so chose these resistors with care.
for the math, there are 3 things to look for with 3 different equations
1. what is the peak current which tells you if you need a boost stage or not. has other implications too
2. what is the average power which tells you the watt rating of the power supply (size of transformer in isolated DC/DC converter)
3. what is the temperature rise of the gate driver IC (usually this one is not even on my list as i am not concerned but in your case i am). 105degC chip max, this means your worse case temp rise with ambient at 40C is not allowed to be higher than 105C - 25C = 80C. so.. ambient at 40C, operational max at 80C, this means your temp rise due to power dissipation is 40C so keep that in mind.
from 1 & 2 and also some additional factors you will get watt requirement of gate resistor. additional factors.. hard to cool these resistors, applying pulsed current but probably you chose resistor type that are not pulse rated (cheaper) for mosfet board.
my feeling is that your leaf inverter at 20khz will need some big watt value gate resistor and because peak current are high the path inductance is going to matter so chose these resistors with care.
Got a galaxy nexus 4 a few moths ago. I like it. Bigger screen would be cool like the note 3 but that's not a laptop... I like opening a few calculators at a time for math like this. As well I can't be bothered to try kicad from a phoneliveforphysics said:Arlo1 said:
Get note3.
Ok spend a few hours getting this together this will be the sch file for the mosfet design. I will simply add a second powersupply for -8 off for the igbt and replace the 4 fets in parallel with a igbt. I'm tired time for a brake. But I think I have it I just need to double check it. and I have a few questions. For one Zombies SCH shows a zener and a diode in series with the desat pin but the PDF for my driver shows just a diode and a resistor.... What do I use.?
I attached a zip file for KICad and im sorry I tried to leave room to make it nice but damn the caps are big in the sch program.
I attached a zip file for KICad and im sorry I tried to leave room to make it nice but damn the caps are big in the sch program.
Attachments
zombiess
10 MW
Arlo1 said:
That zener is something I added based on an app note that showed how to modify the voltage. Desat detection works good on IGBTs but on MOSFETs the RDSon is too low, so you have to add a zener to increase the voltage. With an IGBT you expect something around 7-8V during a fault on the desat pin, but with MOSFETs, you only get around 2-4V, so you have to boost this with a zener. You need to look at the data sheet and see where the desat detection voltage trips at, then choose your diode with a known Vf drop and make up the difference using a zener.
Things to watch out for, temp drift of the MOSFETs/dioide/zener. Another gotchya is the minimum current at which the zener breaks down. To spec the correct zener you need to look at the driver data sheet and see how much current it outputs, the TD350E outputs 250uA. Then look at zener spec sheets and find a zener that breaks down at < 250uA, good companies provide a graph of the current vs break down voltage to help you with this. You'll most likely end up playing with it on the bench like I did to find the correct value zener so just order a bunch different break down voltage ratings in the range you think you'll need.
My spread sheet takes a lot of this into account and give you the desat trip point vs Tj of the MOSFET, it varies a lot between 0C and 125C, but this is not necessarily a bad thing as it can act as a built in automatic derating and protect the MOSFET.
BTW, once you start using desaturation protection, life becomes rainbows and kittens for the MOSFET. I have purposely tried to blow up some MOSFETs by creating a shoot through condition but desat protection wouldn't let me make plasma. I was dumping over 10,000W into a single IRFB4115 MOSFET and it shuts down in < 5uS. That FET is sitting on my bench right now, still works as good as new, even after 20+ zaps of this. I have zapped it into a dead short 100's of times as well, still good.
P.S. your boost stage is missing a 5-15uF XR7 cap that is placed as close as possible to the boost transistors. A 100nF cap should be near them as well. Power > 100nF > 10uF > boost transistors should be how it's laid out. My new layout uses 2 10uF caps in parallel to lower the ESR and hopefully allow current peaks of 10-15A if required.
Really confusing schematic dude, but getting better . What is PNP_BCE for?
It's an incomplete schematics, right? 'Cause the FET's sources and drains are not connected anywhere.
Don't route every ground connection, just put a ground symbol near the part/block. You can use labels for the nodes that have many parts connected. And it's much easier to read if you don't stack vertically things that are parallel (thing like voltage levels, 0V below, intermediate voltage in the middle, the higher system voltage at the top, similar voltage level at the same vertical level in each block).
You may want to try out the smaller basic components from my symbol lib in attach.
. What is PNP_BCE for?It's an incomplete schematics, right? 'Cause the FET's sources and drains are not connected anywhere.
Don't route every ground connection, just put a ground symbol near the part/block. You can use labels for the nodes that have many parts connected. And it's much easier to read if you don't stack vertically things that are parallel (thing like voltage levels, 0V below, intermediate voltage in the middle, the higher system voltage at the top, similar voltage level at the same vertical level in each block).
You may want to try out the smaller basic components from my symbol lib in attach.
Thanks. I just didn't want to confuse input and out put grounds on the driver and I didn't want to confuse upper and lower mosfet sources.Njay said:Really confusing schematic dude, but getting better
It's an incomplete schematics, right? 'Cause the FET's sources and drains are not connected anywhere.
Don't route every ground connection, just put a ground symbol near the part/block. You can use labels for the nodes that have many parts connected. And it's much easier to read if you don't stack vertically things that are parallel (thing like voltage levels, 0V below, intermediate voltage in the middle, the higher system voltage at the top, similar voltage level at the same vertical level in each block).
You may want to try out the smaller basic components from my symbol lib in attach.
I will go over it and try to make it a bit better and finish it.
You can always name those, or do a mix of wiring and naming, wiring the closer parts if it's simple as a strait line and using names to connect several blocks, or to connect it to a connector. Try to keep an entire node wire horizontal, only going vertical when connecting to a component or coming in/going out to a connector.
HighHopes
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your schematic is a good start but there are more corrections to be made, briefly:
- where are your gate ON & OFF resistors? I see each mosfet has series resistor of R.5 but this is for oscillation between mosfets, not the bulk ON/OFF gate resistor
- where is your gate pull-down resistor
- your boost stage will need properly sized surface mount X7R ceramic capacitors to supply the peak currents to the mosfet gate at each pulse
- i wonder if you have unipolar supply properly drawn for this +15Von/clamp_off mosfet gate drive. i did not check in detail, just was a quick look
- we also have to look at other things, like say connector P2 came loose from the boar due to vibrations while rip'n over dirt roads on your bike.. what would happen to gate drive?
- if desat detection works properly to discover a high fault current of 200% FLA and successfully shuts down gate drive, would your brain board ever know that something bad happened? what should brain board do about it?
- where are your gate ON & OFF resistors? I see each mosfet has series resistor of R.5 but this is for oscillation between mosfets, not the bulk ON/OFF gate resistor
- where is your gate pull-down resistor
- your boost stage will need properly sized surface mount X7R ceramic capacitors to supply the peak currents to the mosfet gate at each pulse
- i wonder if you have unipolar supply properly drawn for this +15Von/clamp_off mosfet gate drive. i did not check in detail, just was a quick look
- we also have to look at other things, like say connector P2 came loose from the boar due to vibrations while rip'n over dirt roads on your bike.. what would happen to gate drive?
- if desat detection works properly to discover a high fault current of 200% FLA and successfully shuts down gate drive, would your brain board ever know that something bad happened? what should brain board do about it?
this question is best answered by explaining how the desaturation detection works because then it will become very obvious WHY the zener diode is there and if your gate drive needs it or not and how exactly to chose a value.
The driver has a fault output. But lebowski's current set up does not have any fault inputs. I asked if we can add it and maybe have the brain shut off all outputs and light up the leds in a way to let the user know there is a problem. But at the moment its no used.HighHopes said:
zombiess
10 MW
Redraw the schematic and don't be afraid to take up an entire page. It should read left to right. I had issues with this myself and still do sometimes because of using a lot of components. Its best to set your page size to something big and forget it has boarders. You can break up the schematic into smaller chunks later if need be.
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