zombiess
10 MW
I am trying to figure out how to do a wide input voltage reduction stage for a FET driver setup. Something that can do 50-150V would be nice. Esitmated current requirements are 30mA total for the gate driver circuits at 15V. To get there I need to drop down to an easier to use voltage, probably 20-25V so a regulator can be utilized. DC-DC modules that do this cost too much. I was thinking of using a TL783 to drop to ~40V and then use another TL783 to drop to 15V for my supply. Not pretty or efficient, but it's cheap and I "think" it will get the work done, assuming I have my gate drive power requirements correct.
Gate drive current requirements are
Idrive = Qg * fsw - Average Current supplied to the gate driver
7.3mA = 454nC * 160000
Two gate drives = ~ 15mA
30mA = 2* 15mA to account for headroom an other parasitic losses in the circuit.
Suggestions, corrections? Ideas?
Gate drive current requirements are
Idrive = Qg * fsw - Average Current supplied to the gate driver
7.3mA = 454nC * 160000
Two gate drives = ~ 15mA
30mA = 2* 15mA to account for headroom an other parasitic losses in the circuit.
Suggestions, corrections? Ideas?