New 16-cell Battery Management System (BMS)

[rf]

I suspect the current circuitry is just fine. A least taking into account normal usage.

You could ride until cutoff every time. But I'm certainly not planning to do that ever -- except perhaps to test the system. People tend to keep enough gas in their cars to never run out. I'm the same way with my ebike and expect that other riders are too.

The LVC circuitry is there for the rare time you forget or perhaps there's some sort of failure that causes power to deplete early.

Seems to me that Bob & Gary's BMS/CMS will most likely do it's job very well in 99.9% of installations. With some care, perhaps more than that. I'm very anxious to get hold of a couple of them! I don't want to lose any more expensive battery cells.

Richard

 

[rkosiorek]

I suspect the current circuitry is just fine. A least taking into account normal usage.

<snip a whole bunch>

Richard

I do more than suspect, I am certain that the current circuit is just fine for an enthusiast. It addresses and resolves the most important features of a battery management system. But like most machinery it requires a certain amount of attention and maintenance from the owner/operator. That makes this circuit good for the majority of the readers of this forum who take care of their toys and put them away properly when we are done playing with them.

Most of the points that the anonymous NEW GUY (takes a long time before i trust a guy who hides behind a ridiculous handle) are just nit picking. mostly a matter of opinion in selecting a resistor or capacitor value. these are the type of things that always occur during the shake down and testing of a new design. not a big deal in what we all know is an experimental design.

having gotten that off of my chest, I can also see some value in the new LVC proposed by the NEW GUY. It could be very useful in a product meant to be sold through the big box stores to people who don't know how to take care of their toys. sort of like adding a certain level of moron compatibility.

rick

 

[Randomly]

The reverse leakage currents at the lower current levels involved made me uncomfortable so I took a second pass at the design. I replaced the schottky diodes with diode connected transistors. These will have much lower leakage currents. This change required I add a diode in series with the base of each pass transistor to ensure shutoff when the output of the TC54 goes low. However all the parts are now very cheap and fairly non-critical.

The circuit operates as follows-
Assume all the battery cells are at 3V, above the 2.1V cutoff point of the TC54 ICs. This means the output of all the TC54 are high.
At the bottom stage the high output of IC1 pulls the base of Q1 to 3V, which puts about 2.4V across the emitter resistor R1 creating a pulldown current source around 16 uA out of the collector of Q1. The next highest stage IC2 output is also high and pulls the base of Q2 up through D1 to 5.5V. The 16uA current pulls down on the emitter of Q2 turning it on and the current exits out the collector to the next stage above. The transistor Q12 is connected as a diode, and is reverse biased at this point flowing no current. Each successive stage continues to pass the 16uA current along, and you can insert probably as many as 30 stages. Any more than that and you will need to have fairly high Beta transistors to minimize the current lost to the base on each stage. With a high beta transistor you could probably take it up to 100 stages. Each stage re-uses the same current as the previous stage so quiescent current consumption does not increase with added stages.

Finally the 16ua pulldown current reaches the base of the PNP Q7 pulling it down and turning it on. Because Q7 is configured as an emitter follower the base is pulled negative until Q17 starts to conduct and clamps it to one diode drop below the ground of IC7. The output of IC7 is high and pulls R7 up to the cell voltage, 3V above IC7 ground. This puts 3V minus the diode drop of D6 across R7 and the 120uA flowing through it exits out of the collector of Q7 becoming a 120uA pullup current source which turns the output FETs on.

Now say IC2 detects a low cell voltage of 2.1V and it's output goes low. This removes the base drive from Q2 and the emitter of Q2 is pulled down by the 16ua current until diode connected Q12 starts to conduct and clamps the emitter voltage of Q2 at one diode drop below the ground of IC2. This keeps Q2 off since we have the extra diode drop of D1 in series with the base of Q2. This process shunts the 16uA current off into Q12. There is now no current pulling down on the base of the PNP Q7 and it turns off. R10 shunts any residual leakage currents and keeps them from turning on Q7. This same process works for any stage.

If the top stage IC7 detects a low cell voltage and pulls it's output low it also shuts off Q7 in a somewhat similar manner.

At this point you could just put in the 12V zener D7 to clamp the gate voltage and the pulldown R8 and connect it directly to the gate of the IRB4110.

However the turn on and off times would be quite slow, especially the turn off because of the very large gate capacitance of Q11. It's a bad idea to turn the output FET on or off slowly under heavy load as the power dissipation in the FET will be enormously high during the transition. With a 1000W load the FET will be dissipating 500W in the midst of the transition. A fast transition minimizes the time for the FET to heat up. To accelerate the turn on and off times I've added Q8-Q10 and associate components

To accelerate the turn on time Q8 is connected as an emitter follower to drive the gate. It amplifies the 120uA pullup current by it's Beta so for a beta of 100 the gate pullup current will be 12ma. It may be useful to use a darlington transistor for Q8 which would give you gate turn on currents more in the 0.5-1.0A range making the gate turn on under 1 uSec.

To accelerate the turn off Q9, Q10, D8, and R9 are configured in a positive feedback clamping circuit similar to an SCR. When Q8 is pulled high current flows through D8 and charges up the gate of Q11. As long as Q8 is on and pulls up R9 and the base of Q10, Q10 remains off (and thus also Q9). However when Q7 turns off Q8 also turns off and R9 now pulls the base of Q10 down and turns it on. The collector current of Q10 flows into the base of Q9 turning it on and the collector of Q9 pulls down even harder on the base of Q10 in a positive feedback loop. This rapidly discharges the gate capacitance of Q11 through the emitter of Q10 and slams it to ground. Once the gate voltage falls below 1V the SCR circuit stops conducting and it's ready to be pulled high again by Q8.

In this second pass I've gotten rid of the schottky diodes and some unneeded parts. All the parts are fairly non-critical. Just about any small signal transistor with decent beta at low Ic can be used for Q1-Q6, Q12-Q17. A beta of over 100 at 10uA would be good, 2N5962, 2N5088, 2N5089 is good if you need something in a T0-92 package. Q7 is also fairly non critical and just needs to be able to take the full pack voltage, a KSA992 is rated to 120v. A 2N7051 darlington for Q8 will handle 100v, and 1.5 Amp giving fast turn on times. SS8050 for Q9 and SS8550 for Q10 are good high current and cheap parts that will give very fast turn off times. D8 can be a 1N4001-1N4007 type.

The Quiescent current of this circuit is low. At full pack voltage when the FET is on it is around 150uA, as the cell voltages drop this will drop toward about 100uA. You can reduce this current further, down to less than 50uA, but at the cost of increased switching times of the gate of Q11.
When low voltage cutoff is reached and the circuit turns off Quiescent current drops to about 10uA for those cells below the cell that tripped the circuit. For the cell that went below the 2.1V thresheld the current drain drops to 1uA (the quiescent current of the TC54). All the cells above this also have their current drain drop to 1uA. Any further cell that hits it's LVC threshold also has it's current drain reduce to 1uA.

Because of the active output drive the turn on and turn off times of the output FETs Q11 are very fast which protects Q11 from damage if it turns on or off into a heavy load.
This circuit will fully protect a pack, even if a motor controller or any other load is accidentally left on. If a discharged pack was left uncharged even for an extended time this circuit will continue to function correctly no matter how low the cell voltages fall and will not put any drain on the pack beyond the 1uA quiescent current of the TC54.

 

[jeffkay]

That's great! Can you morph into the circuit a top-of-charge shunt scheme? With at least consideration for higher amp chargers like 10-20Amp as well?
Or better yet a dual purpose shunt to balance at rest as well...
Jeff K. "Deep Cycle"

 

[chas_stevenson]

Seems to me that Bob & Gary's BMS/CMS will most likely do it's job very well in 99.9% of installations. With some care, perhaps more than that. I'm very anxious to get hold of a couple of them! I don't want to lose any more expensive battery cells.

Richard

I agree, I see no reason to make it moron proof. I am not the brightest bulb in the string but I do take care of my toys.

I would like to know if there is an estimated time we can purchase either a kit or complete BMS/CMS. I have 2 sets (5p12s) of A123 cells but I am afraid to use them until I can put a good BMS on them.

Thanks,
Grandpa Chas S.

p.s. I think using cute names can be fun but I like real names better.

 

[bobmcree]

Seems to me that Bob & Gary's BMS/CMS will most likely do it's job very well in 99.9% of installations. With some care, perhaps more than that. I'm very anxious to get hold of a couple of them! I don't want to lose any more expensive battery cells.

Richard

I agree, I see no reason to make it moron proof. I am not the brightest bulb in the string but I do take care of my toys.

I would like to know if there is an estimated time we can purchase either a kit or complete BMS/CMS. I have 2 sets (5p12s) of A123 cells but I am afraid to use them until I can put a good BMS on them.

Thanks,
Grandpa Chas S.

p.s. I think using cute names can be fun but I like real names better.

i am trying to get kits and tested units together this week, i have to decide whether to rev the board first or not. the latest version of the board does not have the individual leds for each channel, but instead has a bi-color led to display the status. i guess i should take a poll of the people interested in the bms to ask how important this is to people. it is nice to have the leds to visually indicate the rate of imbalance in the cells by the time it takes for all the leds to come on. the other issue is whether the one shot housekeeping is really needed at all. most of the chargers i have seen just cut off when the voltage hits the peak, so if the charger cuts off when the shunts are all active, at 3.65v x # of cells then the control logic is not needed.

i have explained this in another thread, but for those who missed it i have a disabling back injury and take a lot of pain killers, and i can only work a couple of hours a day. this is the main reason it has taken so long to get the bms working. as i said before i never really intended for it to be a product, but it does seem to fill a niche, so i will try to get it together soon. i dont want anybody sending me payment until i am confident i can deliver a reliable product, there are plenty of bms units out there that dont work so we dont need another one of those.

one criticism that may be valid and is trivial to address is the gate drive to the cutoff fets. my preference is just to use the ebrake signal, so these parts can normally be left off the board altogether, but for cases where it is not available and people may draw very large currents it is just a matter of changing the gate zener to 12v or so, and i will do this, as there is no reason not to, and no impact on cost at all.

i really do appreciate all the interest. i am just backed up with controller repairs, as i seem to be one of the only guys on the planet willing to fix the ebike controllers i need a few more days to catch up on those before i can really get back to the bms. i know ebike season is almost here and people want to get their rides ready, so i will get moving as fast as i can. if the one shot timing is really necessary there are one shots with built in dividers that can produce longer delays if needed. my belief is that the first 15 minute pulse will work fine, and if the second time out pulse never ends that is just fine. there is no need for the charger to restart without power being removed and reconnected, and an infinite time out pulse will do just that.

 

[OneEye]

Randomly, I know initially your input began as a critique of Bob's circuit design, but at this point should it be split into its own thread?

From my completely ignorant perspective it looks like a good LVC circuit. Of course, as explored in this thread, the LVC capability is only half of the wish list for a "Battery Management System". The other half is cell balancing during charging (which brings up the related issues of how long you need to allow a charger sit at its peak voltage before the entire pack can be considered balanced). Do you have an expanded circuit in mind (as Jeffkay asks) to include charge balancing? I recall you piping up briefly in the PIC-based BMS thread with a critique of the particular part under consideration for a capacitor charge-pump balancer; did you have an alternate part suggestion for a charge-pump scheme, or perhaps a different balancing circuit in mind?

A few questions on your take on an LVC circuit:

1. Do the values of R1, R7, R8, R9, or D7 change as you scale this up to say 12 or 16 cells or down to 4 cells?
2. How high can you scale this setup (24 cells? more?), what components are the limiting factors?
3. Can it be configured to simulate a brake-inhibit signal instead of cutting the pack voltage?

 

[PJD]

Bob,

I'm sure you are aware that to fully-charge a liFePO4 cell (just like lead acid) using CC-CV method, you need to allow for a fairly long time for the CV stage, after all cells reach the desired voltage limit, to allow the charging amperage to decline to a couple hudred mA. In the case of test charging my cells, the CV stage took 1 1/2 hours to get down to 400 mA when initially CC charging at 3 amps. My intent was to adjust all shunts high enough (at least 3.72 volts) to assure the charger "sees" it's CV voltge limit (59.5 volts) and can continue it's normal CV stage of charging. Also, I thing the pack would do just fine leaving the charger connected for a few hours on (3.45 v per cell cell) float, just like a lead acid pack. Valence considers float charging to be just fine for their batteries so I suspect this might be true for other liFePO4's.

So, if the timer logic stays, it would as a minimum, need to be configured to stay on a lot longer than the 16 minutes provided with the current resistor/capacitor values, and the capacitor leakage issue would only help me. So, I guess this is an argument for eliminating the both the one-shot timers and allowing the BMS to be active whenever the charger is connected. What do you think?

 

[jeffkay]

Or timer defeat jumper or switch, Bob? Jeff

 

[fechter]

Randomly, I know initially your input began as a critique of Bob's circuit design, but at this point should it be split into its own thread?

Good idea. I'd like to advance some of the design ideas, but this is not the right thread.

The PIC based BMS thread got pretty trashed out too.

Let's start a new thread for this....

 

[GGoodrum]

Actually, what you want to do is make sure your charger is set high enough that it is a bit higher than the sum of the shunt settings. The shunts actually do the CV portion of the charge cycle. They hold the cells at 3.65V, or 3.7V, or whatever you set it to, and thenthe shunt starts bypassing whatever the cell doesnt use. This way the next cell in series has the full current available, if it needs it.

I agree, however, that with large capacity packs, it can take quite a lot longer than 16 minutes for each cell to reduce the current down to under 200mA. The problem with using shunts, however, aside from having to deal with a lot of heat, is that you have no indication of how much or how little current is going into the cell. The reason is that between the cells and the shunts, the full amount of current is always going through, so you really don't have any indication when it is complete. You can get a rough idea by bulk charging the pack and noting how long the CV portions takes, and then add a bit to that, to be sure, and use that as time you allow, once all the shunts are active.

Having all the LEDs on each channel simply shows that the voltage for that cell has reached the set point where the shunts starts bypassing current. It doesn't give any indication of how much current is being bypassed and/or how much is going into the cell. The only real usefulness they serve is to show if one cell, for instance, is taking longer than the rest to reach the set point. In the original design, the green LED just came on after the first timed period was up. That timer started once all the shunts were starting to bypass current. In the last version I tried, I got rid of the one-shot altogether, and used a bi-color LED that would be lit red, if none of the shunts were active, green if all the shunts were active, and yellowish, if some, but not all the shunts were active. That's a better way, in my opinion, than using the one-shot/timer. I also don't care about having individual LEDs on each channel, as it just doesn't give that much information, but that's me.

-- Gary

 

[kbarrett]

Perhaps we should consider not making perfect the enemy of good?

And maybe getting off Bob's back for now.

 

[PJD]

Perhaps we should consider not making perfect the enemy of good?

Agreed, we at talking only a few $.60 parts here. I don't think we need any more changes to the PC board either.

In fact, I'd be happy to just get the PC board, and some documentation and I'll order the parts.

 

[chas_stevenson]

I agree, I think the latest version of the board should work very well.

I only have two question: I seem to remember that a charger is not needed to charge a pack with the CMS/BMC unit attached. Can a power supply be used in place of a charger to charge the battery pack with this unit? If a power supply is used can it stay connected after the pack is charged, like over night or for a weekend?

Thanks,
Grandpa Chas S.

 

[Randomly]

my preference is just to use the ebrake signal, so these parts can normally be left off the board altogether, but for cases where it is not available and people may draw very large currents it is just a matter of changing the gate zener to 12v or so, and i will do this, as there is no reason not to, and no impact on cost at all.

If you do increase the gate Zener to 12V you will need to put a diode in series with the base of Q6. The reverse Base Emitter junction breakdown voltage of Q6 is only around 6V. With the higher gate voltage of 12V this junction will break down and conduct when the Q5 emitter is pulled low. It may even start to conduct before then.

Randomly, I know initially your input began as a critique of Bob's circuit design, but at this point should it be split into its own thread?

I only brought up some design issues I noticed while looking over bob's schematic, my intention was not to redesign the BMS but just bring up some possible problem areas and some suggestions such as using a higher gate voltage. Bob repsonded that some of my observations were already addressed by pointing out he was using a 4538 variant that did not need protection, and that he was already using a better grade opamp than was listed on the schematic. On the LVC issue which I felt was fairly important I was asked to stop finding fault and offer a better solution. So I contributed the design above that addressed the issues I raised. If anybody wants to use part or all of that they are free to do so. I don't want to build and sell BMS boards, and fortunately Bob and Gary seem to be doing a good job covering those needs. I'm not sure a new thread is needed at this point.

1. Do the values of R1, R7, R8, R9, or D7 change as you scale this up to say 12 or 16 cells or down to 4 cells?
2. How high can you scale this setup (24 cells? more?), what components are the limiting factors?
3. Can it be configured to simulate a brake-inhibit signal instead of cutting the pack voltage?

1. No the values don't change with different numbers of cells. There is a lower limit on the number of cells needed to provide enough voltage to drive the gate drive circuitry to the 12V zener limit but that's about it. If you don't use the 12V gate drive it should work down to 2 cells.
2. With the transistors I suggested it should handle 24 cells easily. I don't think I would go higher than that without using better parts for Q7 and Q8. At higher voltages you may have to 'roll your own' darlington (Q8). Zetex makes some excellent high voltage transistors.
3. I'm sure it can be configured to a brake inhibit signal. However I don't know what the characteristics are of the Brake-Inhibit signal. How low a voltage do you have to pull the Brake line and what is the load (is there an internal pullup)? If you only need to pull the Brake-Inhibit signal within 2 diode drops of ground it's fairly simple, 1 diode drop is also fairly easy if the load is not large. Lower than that gets more complicated. If anybody knows what the Brake-Inhibit signal circuit is I could offer a solution.

There seems to be little interest in improving the BMS, people just want to get something and get on with it. I can certainly understand that feeling. I also have a lot more empathy for Bob now in having to defend oneself against a less than enthusiastic audience. I will just post one last circuit suggestion for whom it may concern and then get out of your hair.

 

[Randomly]

This a quick and dirty modification to Bobs charger design to address proper charge termination. It eliminates the Timers. The LM431 shunt circuits on each cell are unchanged. I'm using the ALL SHUNTS LOW signal and ANY SHUNT LOW signal as they are generated on Bobs schematic.


Circuit Operation -
Referencing Bob's schematic Rev1.14
Recapping the Original circuit operation:
The original circuit connected the battery pack directly to the charger through an IRFB4110 (Q7 in both schematics) when charging first starts. When the ANY SHUNT LOW line goes low, the Q4 gate pullup is released and the LM358 now controls it in a linear mode to regulate the current at a lower level. The charging current is detected by the voltage drop across the 0.005 ohm resistor R11 and the opamp drives the gate of Q7 to match this up to the voltage from the VR-1 pot. When the ALL SHUNTS LOW signal goes low a timer is started. This is the Constant Voltage portion of the charging cycle, the shunts across the cells hold the voltage on the cells constant. When the timer runs out, charging is stopped. When the timer runs out the pack may or may not be fully charged, or it may have finished charging some time ago.

Ideally during the constant voltage charging phase charging should be stopped when the cell charging current drops to some low cutoff threshold and then charging is terminated.
The circuit above attempts to do just that. It is an just an adaptation of the original so there are some common structures.
The charging sequence starts off the same way as the original by connecting the charger directly to the battery pack through Q7 (the IRFB4110). When the ANY SHUNT LOW signal goes low it pulls the gate of Q7 low turning off Q7 Completely.

Instead of using Q7 for the current regulation portion of the cycle, another FET Q3 is used. This is to allow a much larger resistance of 0.1 ohm (R11) to be used for current sensing instead of the 0.005 ohm, giving current sense voltages that are 20X larger making life easier in the rest of the circuit and eliminating the impact of opamp offset voltages. When Q7 is on the charging current is bypassed around this resistor so there is no voltage drop or power dissipation during the high current charging phase. During the current regulation phase dissipation in this resistor will be less than 1/2W at 2 amps. Opamp IC2A performs the same function as in the original circuit and controls the gate of Q3 to match the voltage drop across the current sense resistor R11 to the reference voltage from the adjustable R3-R4 divider. Note that Q3 is a much cheaper and smaller capacity FET than Q7, it also has a much lower transconductance making regulation not so twitchy for the Opamp. Q3 does need heatsinking. Q7 may not but probably should be in case the ANY SHUNT LOW signal oscillates.

When the ANY SHUNT LOW signal goes low and the charger enters the current regulation mode the ALL SHUNTS LOW signal will still be high. This signal drives the base of Q1 through 100K resistor R2. The 10uF cap on the base of Q1 filters this very heavily with a time constant of 1 second with R2. This RC constant is just a guess it may need to be reduced or increased in the final circuit. The base of Q1 is initially a diode drop below the 6V supply, which means the emitter of Q1 will be around 5 volts. This voltage supplies the voltage divider R3-R4 which divides it down 50 times to 0.1V. This sets the Maximum current out during current regulation. 0.1V = 1 amp. This can be adjusted up or down as needed.

The charger continues to operate in this mode till the ALL SHUNTS LOW signal goes low. When this happens the voltage on C1 begins to drop slowly and so does the voltage into the R3-R4 divider. As the reference voltage drops, the current regulator IC2A decreases the charging current out of Q3. At some point the charging current decreases to the point where on one of the cells the charging current drops low enough that all of it is absorbed by the cell and the LM431 for that cell turns off. This pulls the ALL SHUNTS LOW signal high again and the reference voltage starts to slowly rise, and the charging current increases until the ALL SHUNTS LOW signal again goes low again. This cycle continues and the charger will try to match the charging current to keep it on that threshold where the last cell shunt is turning on.

As the cells continue to charge up, the charging current required to maintain that threshold will continue to drop and the average voltage on the emitter of Q1 will slowly get lower and lower.

IC1A is configured as a latching comparator. A reference voltage is set by R5-R6.This is the low current charge termination threshold. Initially the voltage on the Q1 emitter is higher than this so the output of the opamp is high, turning on the LED2 'CHARGING' light. LED1 is off and also Q2. When the voltage on the emitter of Q1 finally falls below the voltage threshold set by the R5-R6 divider the output of IC1A goes low. This pulls the gate of Q3 low through diode D1 turning off the charging current. This also turns on LED1 the 'CHARGE DONE' light, and turns on Q2 which pulls up the negative input of the op amp latching it in this state. The charger will stay in this state until the 'START CHARGE CYCLE' switch is pressed.

C4 is to reduce static discharge glitches possibly associated with the switch. If the LED output loads are giving IC1A problems (output can't swing high enough to keep Q2 off) you may need to buffer one or both of them.

This circuit eliminates the timers and gives a proper charge termination.
The charger applies full current into the battery pack until one of the shunts turns on, Charging current is then reduced to the limit set by the Max Current Adj pot. Charging continues at this reduced current until all the shunts are on. Charging current is then reduced until a minimum current threshold set by the Charge Termination Current Adj. pot is reached at which point charging is stopped and Charging Done LED is lit.

I tried to stay close to the original design, keep it basic, and use inexpensive parts.This is a conceptual schematic, I did not include the rest of Bobs circuit, patch it in as appropriate and fiddle with the values as needed.
Enjoy.

EDIT - Depending on what dual op-amp you are using the emitter of Q1 may be close to the upper limit of the usable input voltage range of the opamp. If you reduce the value of R1 until the emitter of Q1 is less than Vcc-2V (or around 4.0V for a 6.0V supply) when the ALL SHUNTS LOW signal is high that should put the opamp inputs in a safe operating range.

 

[disadvantage]

Who sells the cute little box your prototype CMS is in?

Where can I get a box like that?

 

[GGoodrum]

Who sells the cute little box your prototype CMS is in?

Where can I get a box like that?

I got it from Mouser: http://www.mouser.com/Search/ProductDetail.aspx?qs=jcD%2fCkGBYeP%252bMfIpsMZ6gw%3d%3d

 

[GGoodrum]

Randomly, I'm trying to understand how your circuit addition works, but I'm having a difficult time with ALL SHUNTS LOW logic. The way the shunts works is that whatever part of the current the Q3 current limit logic allows to pass that the cell can't take in, goes through the shunt. The result is that all the current available goes through the combination of the cell and the shunt, for each channel. I'm having trouble getting my head around the notion that if the current is reduced that it will go low enough for the LM431 for that channel to actualy turn off. I could se how this might work at the beginning, when ALL SHUNTS LOW first goes low, but as the cells become fuller it becomes harder for them to absorb any current at all, if the voltage is clamped at around 3.65V. Maybe you could explain a bit more how this would work?

Nonetheless, if it did work, this would indeed be a clever way to control the charge cycle.

-- Gary

 

[Randomly]

Think of it this way. As the cells charge the cell voltage slowly increases towards the clamping voltage of 3.65V. If you stopped charging when the Cell reached that 3.65V threshold the cell voltage will drop slightly below 3.65V without that charging current.

Now If you re-apply just a little current, the cell voltage will increase a little but not all the way to the 3.65V it achieved at the high charging current. The circuit just regulates the charging current at the point where the cell can just absorb the charging current without the voltage going above 3.65V.

Too little current and the cell voltage drops below 3.65 and the circuit tries to slowly increase the charge current. Too much current and the cell voltage goes above 3.65V, the ALL SHUNTS LOW line goes low, and the circuit slowly decreases the charging current until the ALL SHUNTS LOW line goes high again. As the cell fully charges it will take smaller and smaller amounts of charging current to push the cell above 3.65V. When that charging current drops below a minimum charge current threshold the charger turns off.

 

[GGoodrum]

Okay, I think I understand, but that is going to really lengthen the amount of time it takes to do the CV portion. Right now, if I charge a 10Ah pack with a bulk CC/CV 4A charger, it takes takes well over an hour for the current to drop down to under 100mA, in the CV mode. How long is it going to take with this new method?

Also, I sent you a PM, re: some LVC questions I had.

-- Gary

 

[Randomly]

It should not lengthen the CV portion of the charge.
During the Constant voltage portion of the charge the absolute maximum charge current into the pack is set by the Max Current Adj. pot. This MAX current needs to be set low enough that the cell shunts can dissipate the heat. Essentially the same current as the original BMS.

Within this Maximum current limit the charger then regulates the charging current to the maximum that the slowest charging cell in the pack can accept without exceeding the clamp voltage. The other cells will be absorbing current slower than this cell since some of their charge current is being shunted. The end result is that the pack is charged as fast as the slowest charging cell will allow.

You have the freedom to set the Charge Termination Current threshold at whatever current you like, as long as it's below the Max current Adj. point. If Max current is 1A you could set the charge termination at 500ma instead of 100ma. The pack would hold a few percent less capacity but charging would end quicker. Flavor to taste.

 

[fechter]

3. I'm sure it can be configured to a brake inhibit signal. However I don't know what the characteristics are of the Brake-Inhibit signal. How low a voltage do you have to pull the Brake line and what is the load (is there an internal pullup)? If you only need to pull the Brake-Inhibit signal within 2 diode drops of ground it's fairly simple, 1 diode drop is also fairly easy if the load is not large. Lower than that gets more complicated. If anybody knows what the Brake-Inhibit signal circuit is I could offer a solution.

There seems to be little interest in improving the BMS, people just want to get something and get on with it. I can certainly understand that feeling. I also have a lot more empathy for Bob now in having to defend oneself against a less than enthusiastic audience.

The brake inhibit line on the controller is pulled up to 5v with a resistor. I'm not sure of the exact threshold, but an open collector will activate it. The threshold may vary a bit between controller models. Using the throttle signal to stop the controller, the signal must be pulled down to about 1v to stop.

Perhaps others are not interested in improving the design, but I am.
There will always be a 'version 2' or something down the road.

I'm still trying to understand exactly how your LVC thing works. I like the idea of low current drain when the cells are low. I'll stare at it a bit more....

 

[PJD]

There seems to be little interest in improving the BMS, people just want to get something and get on with it.

Exactly. We "consumers" have been waiting since march for the current BMS to be avaialble, even if just in kit form. Your suggested improvements are fine, but excepting critical changes to assure operability of the exsiting design, we don't want any more delays.

However, this is an entirely public project. So if you want to take the initiative to have revised PC boards made that incorporate this design change, it would be appreciated.

And Chas. I believe this BMS is designed for use with either a CC-CV charger or just a power supply. Both should work, although the charger's CV cycle won't actually be used.

 

[Randomly]

There were some requests for a version of the LVC circuit I posted with an output appropriate for an E-Brake or Throttle voltage clamp.

Q8 functions as a Vbe Multiplier clamp and limits the maximum gate voltage on Q11 to about 10V. This varies with temperature but it should always be enough to turn the 2N7002 on fully and never too much that it exceeds the gate voltage ratings.

When the LVC circuit does not detect any low cell voltages Q7 is on and pulls up on the base of Q8 which then pulls the gate of Q11 to ground turning Q11 off. Note that I increased the value of R7 to 82K in this circuit which reduces the LVC quiescent current down to about 40uA (which drops to 1ua on cutoff). The output circuit adds another 25uA (for a 36V pack) which is always present

When a low cell voltage is detected, Q7 turns off which turns off Q8. The collector of Q8 (and the gate of Q11) is now pulled up by R2 until it starts to turn Q8 on again at which point it clamps at about 10V above ground. This turns on Q11 and the EBrake output is shorted to ground through Q11. The on resistance of Q11 is less than 13 ohms (2 ohms typical) which should do the job with just about any Ebrake line or throttle clamp circuit. Ground here means the negative output lead of the battery pack.

This circuit will function properly until the total pack voltage drops to about 5 volts.
A 2N7000 can be used in place of the 2N7002