Earlier I believed advanced control algorithms could overcome running 'hopeless' motors in the sence that they're extremely low inductance and resistance - giving a high current ripple. As far as BLDC is concerned - only low load conditions significantily improve with exotic algorithms like FOC implemented with SVM (Synchronous rectification).
Lately I've been looking into optimizing the MOSFET usage in itself. Thermally and electically I have simple ideas that will make for better performance. Freewheeling diodes does continue to be a major pain in the ass, I'll explain the situation here.
Look at this sketch:
This shows the normal half bridge you find in every controller powerstage. A inductor is added as a reference to the motor.
In this example, current is flowing through the low fet (Q2) into the inductor.
Now the low fet is turned off. The inductor objects any change in current, so in this sketch you see the current take the path through the internal body diode of the low fet.
This is a successfull switching: The turn on of the high fet allows some current to turn off the lower fets body diode. The turn on time is substantial enough such that the body diode have time to shut off. I make this possible by adding a series resistor to the bootstrap capacitor - slowing down the turn on, but not the turn off. This makes for a lazy switching, I use 400nS to turn the high fet on - else the low side fet spuriously 'malfunctions at around 200A, giving a dIF/dt = 500 A/μs. At 500 A/μs the reverse recovery time is about 350nS. Datasheet values is given at 100 A/μs and does climb somewhat exponentially.
This is a unsuccessfull switching: The turn on of the high side fet is faster than the reverse recovery of the lower fet's body diode - this makes for an extremely low impedance between positive and negative rail, everything being absorbed by the mosfets. The literature is spread in what happens next, some show a kind of 'latch up - making for a permanent 'on' diode, and quite quickly fried mosfets. The other shows the diode shutting down 'as planned'.
There is a way to circumvene this problem: tune the high fet turn on directly after the turn off of the low fet. The body diode never conducts, and so there is no charge to be removed. Synchronous rectification at it's best. Dead time between fets is effectively zero between switches. I've made my own version in software, much alike TI's Predictive Gate Driver. My software works most of the time, but it pops a fet every now and then - considerable datalogging reveals the dead time being off shortly before the failure.
Therefore I'm looking for a way around this problem. I still want to tune a 'tight' dead time - but I wonder if some sort of turn off snubber may limit voltage rise time of the lower side switch. Since the snubber only needs to work one way, it can be made 'lossless' with a diode for decharging the snubber capacitor. I need feedback on this idea, has anyone done something like this? I'm at a loss trying to spec dV/dT or what this snubber needs to look like, any input would be greatly appreciated
I hope to have shed some light on mosfet useage in inverters, this switch instant - I'm sure - is often overlooked.
Ps: Note that the current direction in example 3 and 4 switches compared to the first examples - this is not the truth, a minor blunder The current will go the shown way, but not in an instant.
Lately I've been looking into optimizing the MOSFET usage in itself. Thermally and electically I have simple ideas that will make for better performance. Freewheeling diodes does continue to be a major pain in the ass, I'll explain the situation here.
Look at this sketch:
This shows the normal half bridge you find in every controller powerstage. A inductor is added as a reference to the motor.
In this example, current is flowing through the low fet (Q2) into the inductor.
Now the low fet is turned off. The inductor objects any change in current, so in this sketch you see the current take the path through the internal body diode of the low fet.
This is a successfull switching: The turn on of the high fet allows some current to turn off the lower fets body diode. The turn on time is substantial enough such that the body diode have time to shut off. I make this possible by adding a series resistor to the bootstrap capacitor - slowing down the turn on, but not the turn off. This makes for a lazy switching, I use 400nS to turn the high fet on - else the low side fet spuriously 'malfunctions at around 200A, giving a dIF/dt = 500 A/μs. At 500 A/μs the reverse recovery time is about 350nS. Datasheet values is given at 100 A/μs and does climb somewhat exponentially.
This is a unsuccessfull switching: The turn on of the high side fet is faster than the reverse recovery of the lower fet's body diode - this makes for an extremely low impedance between positive and negative rail, everything being absorbed by the mosfets. The literature is spread in what happens next, some show a kind of 'latch up - making for a permanent 'on' diode, and quite quickly fried mosfets. The other shows the diode shutting down 'as planned'.
There is a way to circumvene this problem: tune the high fet turn on directly after the turn off of the low fet. The body diode never conducts, and so there is no charge to be removed. Synchronous rectification at it's best. Dead time between fets is effectively zero between switches. I've made my own version in software, much alike TI's Predictive Gate Driver. My software works most of the time, but it pops a fet every now and then - considerable datalogging reveals the dead time being off shortly before the failure.
Therefore I'm looking for a way around this problem. I still want to tune a 'tight' dead time - but I wonder if some sort of turn off snubber may limit voltage rise time of the lower side switch. Since the snubber only needs to work one way, it can be made 'lossless' with a diode for decharging the snubber capacitor. I need feedback on this idea, has anyone done something like this? I'm at a loss trying to spec dV/dT or what this snubber needs to look like, any input would be greatly appreciated
I hope to have shed some light on mosfet useage in inverters, this switch instant - I'm sure - is often overlooked.
Ps: Note that the current direction in example 3 and 4 switches compared to the first examples - this is not the truth, a minor blunder The current will go the shown way, but not in an instant.