dimpirate
100 W
We have had amazingly few failures out in the field. A common theme has shown up where after a user "makes sparkles" buy making a balance tap mistake (i.e. shorting cells 1-6 with cells 7-12) the probability of damaging the detector chips goes up significantly. Symptoms for damage include higher discharge rates, opto's latched open, opto's latched closed. Without going into a long story about how hard I have worked to make this circuit ultra-ultra low power - suffice to say that the tradeoff for low power is an increased vulnerability to customer miss-wiring. The best way to handle a situation where the customer makes bike sparkles is to have them send the board in for testing. I have a really nice test rig that will allow me to test the leakage current of every channel and confirm the LVC and HVC functionality in a system configuration (i.e. every channel powered while one single channel triggers). As a side note - it is extremely important to test in a system configuration due to the high probability of channel cross contamination (i.e. two channels on the board start interacting due to a low impedance path etc)
I want to make sure my current setup is working properly. Above methods recommends to send boards back to him for testing. At the moment that's not quite an option.
Anyone have some advice on how to check each board, check throttle retard is operational, and of course HVC breaker.
Thanks for any input