ZapPat
10 kW
Hi Doc!
It's actually the low side FETs that will heat up more, specially at low PWM duty cycles (when at lower speeds). While there is one FET output doing PWM, remember that there is always one other phase being held to ground (batt-) too. So you get PWM losses on one low side FET, plus conduction losses on another at any one time.
Adding power path resistance doesn't help with paralleled FETs as it would with transistors. The nature of the beasts are different, the FETs having current sharing problems mostly during dynamic transition times (when they change state with each PWM period), vs the transistors having sharing problems mostly during static times (conduction). I have read that having higher FET source inductance does help share current during the switching events, but it is also generaly not good to have inductance in the switching path as it raises PWM losses. And I don't think 2-3mm longer leads for these pretty slow switching ebike controllers will change much.
Anyways, to avoid having too much uneven current sharing with FETs you would want to...
- Place all paralleled FETs thermaly close together - a very direct heat path from FET tab to FET tab as you are suggesting is good
- Use FETs of the same production batch
- Make sure the paralleled FET's power paths and gate drive paths are all electricaly symetrical as possible (no control...)
- Use individual gate drive resistors (no control...)
- Avoid pushing your FETs into avalanche (which makes current sharing much harder yet) by not using them too close to their max voltage rating.
Hope this helps!
Pat
Doctorbass said:[...]
I also know that it's the Hi side that generate more heat so puting directly the mosfet to it without insulator would be just better... the low side can still survive by leaving them with standard insulator method.
Doc
It's actually the low side FETs that will heat up more, specially at low PWM duty cycles (when at lower speeds). While there is one FET output doing PWM, remember that there is always one other phase being held to ground (batt-) too. So you get PWM losses on one low side FET, plus conduction losses on another at any one time.
Doctorbass said:Luke, Any idea on leaving longer legs on the fets to increase a little bit their resistance and better match them in parallel??
I mean alot of high power amplifier are using low ohm resistor between the rail and collector and emitter to compensate for the gain difference and make a better equilibrium on the current share...
Could leaving the fet leg like 2-3mm longer could help that... or cold it also decrease performance on another way by doing that... any pros and con ??
Doc
Adding power path resistance doesn't help with paralleled FETs as it would with transistors. The nature of the beasts are different, the FETs having current sharing problems mostly during dynamic transition times (when they change state with each PWM period), vs the transistors having sharing problems mostly during static times (conduction). I have read that having higher FET source inductance does help share current during the switching events, but it is also generaly not good to have inductance in the switching path as it raises PWM losses. And I don't think 2-3mm longer leads for these pretty slow switching ebike controllers will change much.
Anyways, to avoid having too much uneven current sharing with FETs you would want to...
- Place all paralleled FETs thermaly close together - a very direct heat path from FET tab to FET tab as you are suggesting is good
- Use FETs of the same production batch
- Make sure the paralleled FET's power paths and gate drive paths are all electricaly symetrical as possible (no control...)
- Use individual gate drive resistors (no control...)
- Avoid pushing your FETs into avalanche (which makes current sharing much harder yet) by not using them too close to their max voltage rating.
Hope this helps!
Pat